Chapter 2 Installation 29
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1 2 3
Watchdog timer setup
Watchdog timer time-out
signal select (JP4)
If CPU processing comes to a halt because of EMI or software
bug, the watchdog timer can either reset the CPU or signal an
interrupt on IRQ15.
Watchdog timer time-out signal select (JP4)
Reset CPU*
IRQ15
* default
Watchdog timer programming
The watchdog timer must be programmed to write to I/O port
address 443 at an interval shorter than the timer's preset interval.
The timer's interval has a tolerance of ±5%, so you should
program an instruction that will refresh the timer before a time-
out occurs. The following steps illustrate how you might
program the watchdog timer.
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