Picaso Processor
Datasheet
©
2017 4D Labs Semiconductors
Page 12 of 27
www.4dsystems.com.au
5.5.
Touch Screen Interface
The Picaso supports 4-Wire resistive touch panels. The
diagram below shows a simplified interface between
the Picaso and a touch panel.
XR pin (Touch Panel X-Read input):
4-Wire Resistive Touch Screen X-Read analog signal.
Connect this pin to XR or X+ signal of the touch panel.
XL pin (Touch Panel X-Drive output):
4-Wire Resistive Touch Screen X Drive signal. Connect
this pin to XL or X- signal of the touch panel.
YU pin (Touch Panel Y-Read input):
4-Wire Resistive Touch Screen Y-Read analog signal.
Connect this pin to YU or Y+ signal of the touch panel.
YD pin (Touch Panel Y-Drive output):
4-Wire Resistive Touch Screen Y Drive signal. Connect
this pin to YD or Y- signal of the touch panel.
5.6.
GPIO – General Purpose IO
There are 13 general purpose Input/Output (GPIO)
pins available to the user. These are grouped as
IO1..IO5 and BUS0..BUS7. The 5 I/O pins (IO1..IO5),
provide flexibility of individual bit operations while the
8 pins (BUS0..BUS7), known as GPIO BUS, serve
collectively for byte wise operations. The IO4 and IO5
also act as strobing signals to control the GPIO Bus.
GPIO Bus can be read or written by strobing a low
pulse (50 nsec duration or greater) the IO4/BUS_RD or
IO5/BUS_WR for read or write respectively. For
detailed usage refer to the separate document titled:
Picaso Internal Functions Manual
IO1-IO3 pins (3 x GPIO pins):
General purpose I/O pins. Each pin can be individually
set for INPUT or an OUTPUT. Power-Up Reset default
is all INPUTS.
IO4/BUS_RD pin (GPIO IO4 or BUS_RD pin):
General Purpose IO4 pin. Also used for BUS_RD signal
to read and latch the data in to the parallel GPIO
BUS0..BUS7.
IO5/BUS_WR pin (GPIO IO5 or BUS_WR pin):
General Purpose IO5 pin. Also used for BUS_WR signal
to write and latch the data to the parallel GPIO
BUS0..BUS7.
BUS0-BUS7 pins (GPIO 8-Bit Bus):
8-bit parallel General purpose I/O Bus.
Note:
All GPIO pins are 5.0V tolerant.