Hardware Development Guide of Module Product
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VDD_3V3
USIM_POWER
USIM_DATA
USIM_CLK
USIM_RESET
PON_TRIG
W_DISABLE
PERST
VDD_3V3
USB_DM
USB_DP
VDD_3V3
VDD_3V3
LED_PWR
VDD_3V3
47
GND
KPD_PWR_N
GND
GND
BQ_CE2
UART_RFR
GND
UART_CTS
GND
PCI_UART_RX
PCI_UART_TX
VBAT
GND
PCI_WAKE
PCI_SPI_MISO
PCI_SPI_MOSI
PCI_SPI_CLK
GND
GND
GND
GND
GND
GND
GND
PCI_SPI_CS_N
SLIC_RST0
SLIC_INT0
GPIO_79
BQ_CE2
PCI_3V3
BATT_NTC
BQ_CHG
GND
PCI_PCM_CLK
PCI_PCM_DIN
PCI_PCM_DOUT
PCI_PCM_SYNC
WAKE*
COEX1
COEX2
CLKREQ*
GND[1]
REFCLK-
GND[2]
RESERVED5_UIM_C8
RESERVED4_UIM_C4
GND[4]
PERN0
PERP0
GND[6]
GND[7]
PETN0
PETP0
GND[9]
GND[10]
3V3VAUX[2]
3V3VAUX[3]
GND[12]
RESERVED3
RESERVED2
RESERVED0
RESERVED1
3V3VAUX[0]
GND[0]
1V5[0]
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
GND[3]
W_DISABLE*
PERST*
3V3VAUX[1]
GND[5]
1V5[1]
SMB_CLK
SMB_DATA
GND[8]
USB_D-
USB_D+
GND[11]
LED_WWAN*
LED_WLAN*
LED_WPAN*
1V5[2]
GND[13]
3V3VAUX[4]
Figure 4-1 PIN Configuration Diagram
4.1.3 PIN Description
Table 4-2 PIN Interface Definition
Pin
number
Protocol signal
name
Signal definition
1.
WAKE#
PCI_WAKE
2.
3.3Vaux
VDD_3V3
3.
COEX1
PCI_SPI_MISO
4.
GND
GND
5.
COEX2
PCI_SPI_MOSI
6.
1.5V
KPD_PWR_N
7.
CLKREQ#
PCI_SPI_CLK
8.
UIM_PWR
USIM_POWER
9.
GND
GND
10.
UIM_DATA
USIM_DATA
11.
REFCLK-
PCI_SPI_CS_N
12.
UIM_CLK
USIM_CLK
13.
SLIC_RST0
Содержание ZM8620
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