48
CIRCUIT DESCRIPTION
Pin
ID
Function
Active
1
IRIN
Receives Remote Control Inferred pulses.
Data
2
SDA1
Serial Data Sent and Received from the EEPROM, A/V Selector, DAC1, DAC2.
Function of I2C.
Data
3
SCL1
Serial Clock Synchronization Sent to the EEPROM, A/V Selector, DAC1,
DAC2. Function of I2C.
Data
4
Dimmer
Receives DC voltage generated from the Photo Receiver on the Front Panel
monitoring Room Light. For AI
DC
5
AD Key In Receives Level Shifted DC voltage from Front Panel Key presses.
DC
6
Main/Sub
AFC
Receives the Main Tuner AFC or Sub AFC DC Voltage switched by I005. Used
during channel change.
DC
7
Key In
When the Power switch is pressed, Clock data from pin 21 is routed through
Q014 back to this pin. Power is toggled On or Off.
Data
8
Not Used
Not Used
N/A
9
Not Used
Not Used
N/A
10
Main FV
Det
Receives Composite 1 V Sync from I015 pin 4 for OSD Positioning.
Sync
11 Sub FV Det Receives Composite 2 V Sync from I016 pin 4 for OSD Positioning.
Sync
12 DSP Busy Receives the Busy command from the Digital Surround Processor on the
Surround PWB.
DC
13
DSP SO
Control command to the DSP Unit for controlling Modes.
Data
14
DSP Dir
Receives Digital Surround Processor Error information from the DSP unit on the
Surround PWB.
Data
15
DSP SS
Control command to the DSP Unit for controlling Modes.
Data
16
DSP SCK Digital Surround Processor Clock.
Data
17
DSP S1
Control command to the DSP Unit for controlling Modes.
Data
18
DSP ERR
Mute
Mutes Audio when a DSP Dir input is detected. (DSP Error).
DC High
19 DSP Reset Resets the DSP module on the Surround PWB
DC High
20
Clock
Sent to the Level Shift I014 then to both Tuners and the Flex Converter as a
timing signal. Also see pin 7.
Data
21
Data
Sent to the Level Shift I014 then to both Tuners and the Flex Converter to
control each unit.
Data
22
Comp 1/2
FH Det
Either Component One or Two Horizontal Input from I005 through Q046. Used
for OSD Display. And Auto Link
DC
23
AC In
Receives Timing pulses for advancing the Clock. Received from the Smitt Amp
Q008 and Q009
60Hz.
24
Main/Sub
SD Det
Station Detection. Used during Auto Programming and when channels are
changed to open AFC Loop. Switched by I005.
Sync
25
VDD
Stby +3.3V generated by 0029. Main Microprocessor B+.
DC
26
CHL
Clamp level High
DC
27
VRefFHS
Use as a reference signal within the Microprocessor High Frequencies.
DC
28
CVBS0
Composite Sync used for Closed Caption Detection for the Main Tuner.
Sync
29
VSS
Ground
N/A
30
CVBS1
Not Used. Composite Sync used for Closed Caption Detection for the PinP
Tuner.
N/A
31
VREFLS
Reference Signal used within the Microprocessor Low Frequencies.
N/A
32
CLL
Internal function of the Microprocessor.
N/A
