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CIRCUIT DESCRIPTION
dark and a little more dark just before it arrives. This gives the impression that the signal pops out of the
screen or a 3D effect. The Microprocessor communicates with the 3D Y/C module via I 2 C bus data and
clock. The communications ports are from the Microprocessor pins (59 SDA2 and 60 SCL2) to the 3D Y/
C PYC1 connector pins (2 and 3) respectively. The Microprocessor also is able to turn on and off circuits
within the 3D Y/C module determined by customer menu set-up.
Main Video Chroma I201
The Main Video Chroma IC processes the video and chroma from the 3D Y/C module for the main picture.
It converts video into Y and chroma into Cr/Cb (NTSC Only). Communication from the Microprocessor
via pins (59 SDA2 and 60 SCL2) to I201 pins (34 and 33) respectively.
ON THE TERMINAL PWB:
A/V Selector I401
The A/V Selector IC is responsible for selecting the input source for the Main Picture as well as the source
for the PinP or Sub picture. Communication from the Microprocessor via pins (2 SDA1 and 3 SCL1) to the
PST1 connector pins (5 and 6) respectively then to I401 pins (34 and 33) respectively.
Sub Video Chroma I403
The Sub Video Chroma IC processes the video and chroma for the Sub or PinP picture. It converts video
into Y and chroma into Cr/Cb (NTSC Only). Communication from the Microprocessor via pins (59 SDA2
and 60 SCL2) to connector PST1 pins (1 and 2) I403 pins (34 and 33) respectively.
ON THE DEFLECTION PWB:
Sweep Control I701
The Sweep Control IC is responsible for generating Horizontal Drive and Vertical Drive signals. The Micro-
processor must tell the IC when certain things are done in the Service Menu. When Cut Off is performed,
the Vertical is collapsed. The Microprocessor tells I701 to stop producing Vertical Drive. At the same time,
I701 must stop the Spot Killer circuit from operating. This is accomplished by placing pin (24 DAC3) high
which activates QN07 which inhibits spot killer high. In addition, when H.Phase is adjusted, the Micropro-
cessor controls the H. Drive signals phase in relationship to H.Blk, which is timed with video sync. This
gives the appearance that the horizontal centering is being moved. Communication from the Microprocessor
via pins (59 SDA2 and 60 SCL2) to the PSD2 connector pins (2 and 3) and then to I701 pins (16 and 17)
respectively.
ON THE SUB VIDEO PWB (2H VIDEO):
Rainforest IX01
The Video Processing IC (Rainforest) is responsible for controlling video/chroma processing before the
signal is made available to the CRTs. Some of the emphasis circuits are controlled by the customers menu.
As well as some of them being controlled by AI, (Artificial Intelligence). Communication from the Micropro-
cessor via pins (59 SDA2 and 60 SCL2) to the PSZ2 connector pins (1 and 2) and then to IX01 pins (27
and 26) respectively.
