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CONFIDENTIAL

Z3-DM8168-PCI-RPS V1.05.01c

___________________________________________________________________________________________

Z3 Technology, LLC

♦

100 N 8

ST, STE 250

♦

Lincoln, NE 68508-1369 USA

♦

+1.402.323.0702

Revision History

Version Date

Change Note

Author

0.00.01

12/05/11 Original Z3-DM8168-PCI-RPS System

0.00.02

12/08/11 Updated general description

0.00.03

12/08/11 Updated Section 1, 6 & 9. Fixed grammatical errors

0.00.04

12/14/11 Added Section 5.1 and 5.2

0.00.05

12/17/11 Rewrite section 1, revised sections 3 and 4

0.00.06

12/18/11 Technical revision with major changes throughout. Added to new section

1, full rewrite of section 2.

0.00.07

12/19/11 Added demo diagrams and other images. Updated document format.

Updated section 11.

0.00.08

12/21/11 Added PCIe information

0.00.09

12/21/11 Updated Image. Edited Table of Contents

1.00.00

12/22/11 Updated Z3-DM8168-PCI-RPS Image

1.01.00

02/13/12 Added Troubleshooting Section

1.02.00

06/01/12 FCC and CE Mark Statement

1.03.00

07/16/12 Address Update

1.04.00

07/16/13 Wording and formatting changes, correction on p.12 and p.16

1.05.01

01/15/14 Made formatting changes to fit new format of User’s Guides, added more

information. Made version number consistent with software version for
easier tracking.

1.05.01a

01/16/14 Photos updated

1.05.01b

01/16/14 Modified known issues, added note that component output not supported

1.05.01c

01/20/14 Adjusted measurement in Figure 1

Содержание Z3-DM8168-PCI-RPS

Страница 1: ...20 2014 Before attempting to connect or operate this product please read these instructions carefully and save the manual for future use This document contains proprietary and confidential information of Z3 Technology LLC Z3 This document may not be used reproduced disclosed or disseminated to anyone without the prior written approval of an authorized representative of Z3 ...

Страница 2: ...write of section 2 BM 0 00 07 12 19 11 Added demo diagrams and other images Updated document format Updated section 11 CH 0 00 08 12 21 11 Added PCIe information BM 0 00 09 12 21 11 Updated Image Edited Table of Contents CH 1 00 00 12 22 11 Updated Z3 DM8168 PCI RPS Image CH 1 01 00 02 13 12 Added Troubleshooting Section CH 1 02 00 06 01 12 FCC and CE Mark Statement NS 1 03 00 07 16 12 Address Upd...

Страница 3: ...erminal window 12 5 4 Power on the board 13 5 5 Ensure your PC has a proper IP address 14 5 6 Run the Web Interface to configure encode 14 5 7 Run VLC to view stream 16 5 8 Streaming RTP 17 5 9 Showing encode passthrough on a screen Optional 18 5 10 Adjusting for latency and quality 18 6 Running the Software Decode 19 6 1 Connect the Decoder board 19 6 2 Set up the Decoder board to work with the E...

Страница 4: ...168 PCI RPS Main Menu 13 Figure 5 Encoder Settings Screen Top Half 14 Figure 6 Setting Encode Parameters for TS Streaming 15 Figure 7 VLC Network Screen Setting to Receive Z3 TS Stream 16 Figure 8 Example of Z3 Video Streaming on VLC UDP 16 Figure 9 Example of Z3 Video Streaming to VLC RTP 17 Figure 11 Tuning for Various Use Cases 18 Figure 10 HDMI Out to Show Encode Passthrough 18 Figure 12 Conne...

Страница 5: ...8 APP 2x application board includes 1 HDMI 1080p60 input 1 Component Analog Audio input and 1 HDMI 1080p60 output It includes a 2 lane PCIe interface that can plug into a 4 lane or 16 lane PCIe slot or a 1 lane PCIe slot with open back It has been proven on an ASUS motherboard model P8H67 M PRO CSM revision 3 0 In order to make custom hardware and software development easier the Z3 DM8168 PCI RPS ...

Страница 6: ...168 PCI RPS software is based on the Linux OS The kit comes with all of the low level resources such as the Linux kernel u boot tool chain and starter file system pre integrated and configured There is no need to port or integrate OS functions media functions etc The software bundle also contains tools to allow the development of high level applications using hardware accelerated video processing ...

Страница 7: ...ensity connectors to interface to all signals Modular approach allows for rapid and cost effective deployment of customer s applications Standalone operation independent of PCIe host makes it an easier development environment to work with PCI Express 2 lane add in card footprint provides high bandwidth communication with a PCI host 2 1 Supported Input Resolutions HDMI 1080p60 1080p50 1080i30 1080i...

Страница 8: ...chain You can determine whether your OS is 64 bit by using the uname p command A 64 bit OS will return x86_64 while a 32 bit OS will return i386 i586 or i686 For 64 bit Ubuntu you can get the necessary libraries by typing sudo apt get install ia32 libs For 64 bit Fedora you can type sudo yum install glibc i686 3 2 Making the Directories and Running the Make Script The software provided will allow ...

Страница 9: ..._________________________________________________ Z3 Technology LLC 100 N 8th ST STE 250 Lincoln NE 68508 1369 USA 1 402 323 0702 9 The outcome of the build process should be newly created image files in the images directory You can confirm this by doing the following cd images ls alt ...

Страница 10: ...testing scripts the user can disregard these filesys The base filesystem for release kernels Kernel code for release sysapps Various supporting applications toolchain The ARM toolchain for building the codebase u boot u boot code for release z3apps Z3 demo application code and scripts 4 1 EZSDK documentation Documentation on the EZSDK can be found in ezsdk docs Below is a list of the documentation...

Страница 11: ...sing the Z3 DM8168 PCI RPS to stream 1080p or 1080i video to VLC running on your PC 5 1 Set up the HD Source 1 Select an HD source with HDMI non HDCP output in Z3 s testing the Brite View BV 5005HD is used Power on the HD Source Connect HDMI to a monitor Set the HD Source to 1080p or 1080i output Select content you would like to stream 5 2 Connect the board For these steps please refer to Figure 3...

Страница 12: ...t the Ethernet The next step is to set up a terminal to view the activity of the board 5 3 Set up the terminal window 5 If you are running from a Windows PC run TeraTerm Select Setup Serial Port and set the following Port Whichever serial port the port is connected to Baud Rate 115200 Data 8 bit Parity None Stop 1 bit Flow Control None 6 If you are running from Linux type sudo minicom s And then c...

Страница 13: ...nect the 12V power supply and turn on the switch If all is configured properly you should see the board booting up within the terminal window After about a minute you will see the Z3 DM8168 PCI RPS Main Menu Note the local IP address and netmask in this example it is 192 168 81 68 and 255 255 0 0 This is the IP address of the board You will need this later to access the web interface Figure 4 Z3 D...

Страница 14: ... Ensure that this is the case If necessary use the P and Q options in the RPS menu to modify the address network mask of the board to conform to your network Note that the first 2 parts being the same are based on a netmask of 255 255 0 0 If netmask were 255 255 255 0 then the first 3 parts of the IP address would have to be the same After you are done make note of the address you set your PC to T...

Страница 15: ...11 Set Output Format to MPEG 2 TS and Dest IP Address to the IP address of your PC in this example 192 168 0 6 Also make note of the value of Dest Port should be 8888 by default 12 Click Start After about 6 seconds the status should change from idle to Running Figure 6 Setting Encode Parameters for TS Streaming a Change format to MPEG 2 TS b Change Dest IP Address to PC IP address adaddaddress c N...

Страница 16: ...Run VLC to view stream 13 Run VLC on your PC version used in testing at Z3 2 05 14 Select Media Open Network Stream In the box type udp 192 168 0 6 8888 where 192 168 0 6 is the IP address of your PC and 8888 is the value of Dest Port noted in step 11 15 Press Enter 16 You should now see video streaming to VLC Figure 7 VLC Network Screen Setting to Receive Z3 TS Stream Figure 8 Example of Z3 Video...

Страница 17: ...se from Z3 To stream using RTP do the following steps 15 In the Encoder settings tab click on Stop to stop the current encoding session 16 Change Output Format from MPEG 2 TS to RTP see Figure 6 17 Change Dest IP Address to 225 1 2 3 18 Confirm that Dest Port see Figure 6 is 8888 this will be important for the VLC configuration 19 Click Start to start streaming 20 Copy the z3 netra multicast sdp f...

Страница 18: ...to work with The higher this value the more buffers it has to work with and the more time it has to smooth things out for challenging content However a higher value also causes latency to increase accordingly To minimize latency this value should be set to the lowest possible value The lowest value Z3 recommends is 150 B frames improve the quality of the picture but they also increase the latency ...

Страница 19: ...case the decoder settings may have to be adjusted 6 1 Connect the Decoder board 1 Connect the supplied 2 5mm serial cable and NULL modem adapter to your PC 2 Take the HDMI cable connected to the monitor and connect it to HDMI Out of the RPS 3 Connect the Ethernet Make sure the Ethernet is connected to a hub router that is also connected to the Encoder board and PC 4 Configure the PC terminal progr...

Страница 20: ...steps 6 In the serial menu type X to exit the serial menu 7 This should take you to the linux prompt From here type fw_setenv ipaddr 192 168 81 67 opt z3 fw_setenv ipaddr 192 168 81 67 8 Then reboot the system by typing reboot f opt z3 reboot f 9 You should then see the Decoder board reboot In the serial menu you can verify the new IP address has taken effect 10 In your PC run a web browser for be...

Страница 21: ...d 192 168 81 68 change the settings to match those in the figure below Here a multicast address is used You can also try streaming unicast to 192 168 81 67 multicast allows you to also open VLC and view the stream from there 6 4 Configure the Decoder 12 Now go to your Decoder board 192 168 81 67 controls The first thing you want to do is switch to Decoder mode This can be done by changing Operatin...

Страница 22: ...now change to Decoder Settings Change the settings to match the settings below 14 Click on Start on both the Encoder board and Decoder board 15 You should now see video and hear audio from your TV monitor 16 You can also view the content using VLC Open VLC as you did in the Encode instructions and use the address udp 225 1 2 3 8888 for the URL Figure 16 Decoder Settings for Sample Decode Change to...

Страница 23: ...tion 5 and optionally Section 6 running you can modify the options in the GUI to exercise other features These include Modifying audio video bitrate Modifying the H264 profile Setting of P frames per GOP You can also store the configuration as the default configuration or a custom configuration Besides using the web based GUI you can also use the serial menus Details on the different parameters th...

Страница 24: ...un the Web Interface Steps 1 9 in Section 5 2 Click on the System Setup Tab 3 In the System Setup Tab click update device firmware Note If update device firmware is greyed out it is because the encoder or decoder is running If you click Stop at the bottom of the screen then update device firmware will become active and you can then click it 4 This brings you to the Software Updater screen Click Br...

Страница 25: ...efault manufacturing values z3 netra upd img is the same as z3 netra mfr img except it will not make any changes in the u boot environment values If you have not made any changes in the u boot environment variables then z3 netra upd img and z3 netra mfr img are the same see step 3 in Section 8 2 for more on modifying u boot environment variables 4 Click Open 5 Click Upload and Update You should se...

Страница 26: ...installed sudo apt get install xinetd tftpd tftp b Create the file etc xinetd d tftp Set server args to home An example of a tftp file would be service tftp disable no socket_type dgram protocol udp wait yes user nobody server usr sbin in tftpd server_args home c Make a tftpboot directory sudo mkdir tftpboot sudo chmod R 777 tftpboot sudo chown R nobody tftpboot d Start TFTP sudo etc init d xinetd...

Страница 27: ...ctory name may be different depending on your specific release cd home z3 z3 netra ln s z3 netra DM8168 PCI RPS 20130702 images images ln s z3 netra DM8168 PCI RPS 20130702 filesys filesys f Start the NFS server sudo service nfs kernel server restart 3 Configure u boot on your board to match your system configuration settings a Reboot the board with minicom or TeraTerm setup on your PC see Steps 5...

Страница 28: ...sy to transfer from minicom later cp u boot env netra txt home z3 f Now set up your terminal program to take input from a file If you are using minicom type ctl A then Z This should bring up the minicom Command Summary From here type T to bring up the Terminal Settings window From here set Newline tx delay ms option D to 100 and Character tx delay ms option F to 1 g Press return to save your termi...

Страница 29: ...ng to your home directory From here use the up and down arrow keys to scroll down and select the u boot env netra txt file you modified and then copied in step 3e Press the space bar to tag the file Then use the left and right arrow keys to select Okay Press return j You should then see a series of commands being pasted within u boot The very last line should say Writing to Nand done k Type printe...

Страница 30: ...ection in Appendix B 8 3 Other available u boot commands Besides booting from NAND and TFTP NFS there are other boot configurations that are possible Below are the possible options provided in the Z3 u boot environment setenv bootcmd run boot nfs Get kernel from TFTP root file system from NFS setenv bootcmd run nand_boot_nfs Get kernel from NAND root file system from NFS setenv bootcmd run nand_bo...

Страница 31: ...e bitrate for the audio Video Resolution 320x180 1920x1080 Deinterlace Follow Input The input resolution Note 1 Follow input Generate encoder resolution based on capture resolution detected De interlace Follow input and de interlace De interlace On Off Causes the de interlacer to be activated can also select De interlace for the video resolution Rate Control VBR CBR If CBR 1 the encoder will drop ...

Страница 32: ...t chapter markers in the content the DVD standard requires that any GOP used as a chapter marker must be a closed GOP The default is Open B frame Interval 1 3 3 of B frames between P frames minus 1 Setting 1 means no B frames Setting 3 means 2 B frames between every P frame Audio Delay 0 1000ms Can be used with video delay to adjust audio video offset when the A V sync of the source is a little of...

Страница 33: ...ollow input Note 2 GOP Sizes Supported 10 12 15 25 30 50 60 100 120 200 240 frames 9 2 The Decoder Settings Tab Parameter Options default in bold Notes Input Interface Ethernet Where to get the stream In this RPS only decode from Ethernet is supported Input Format RTP MPEG 2 TS Allows user to select between receiving RTP streams or MPEG 2 TS streams IP Port 192 168 a b pppp 225 1 2 3 8888 Set to t...

Страница 34: ...720 720p 50 1280x720 480p 720x480 576p 720x576 480i NTSC 576i PAL The resolution to display If different from the input stream resizing will occur 9 3 The System Setup Tab Parameter Options default in bold Notes Local IP Address 192 168 x y 192 168 81 68 Sets the IP address of the Z3 DM8168 PCI RPS Local Netmask 255 255 z w 255 255 0 0 Sets the netmask of the Z3 DM8188 PCI RPS Default Gateway 192 ...

Страница 35: ... Appearing at the Bottom of All Tabs Parameter Options default in bold Notes preset encoder factory default decoder factory default any user defined profiles The configuration file to use Encoder decoder factory default Factory settings Can also add more profiles Save Click on this to save preset value to what was selected Note if different values in different tabs are changed then Save should be ...

Страница 36: ...k in all situations The PCI Express Card Electromechanical Specification document section on Card Interoperability is a good reference The document is available for members from the PCI Group at http www pcisig com specifications pciexpress base 10 2 PCIe BIOS on the PC When the PC is first powered up its BIOS performs some system tests and initialization including PCI Express initialization The B...

Страница 37: ...pable to perform as a root complex or endpoint In order for the Z3 module to be used in a specific PCI Express setting the module must have the proper configuration By default Z3 ships Z3 DM8168 MOD 2x modules configured as root complex and Z3 DM8168 MOD 3x configured as endpoint The Z3 DM8168 PCI RPS kit contains a Z3 DM8168 MOD 3x module and therefore is by default configured as an endpoint At t...

Страница 38: ...he PCIe bus is provided as part of the EZSDK in the ezsdk example applications linux driver examples psp pcie directory The boot example application takes command line parameters with the file names for u boot kernel and root file system uploads them and boots the DM8168 The application relies on an underlying device driver to provide low level access to the DM8168 device addresses as set by the B...

Страница 39: ...Z3 Technology LLC 100 N 8th ST STE 250 Lincoln NE 68508 1369 USA 1 402 323 0702 39 11 Known Issues The following are the known issues with this release These will be addressed in an upgrade to the Z3 DM8168 PCI RPS 1 When decoding RTP audio is not yet supported If audio decode is required the source should be set to stream using UDP ...

Страница 40: ...rnel Image uncompressed Data Size 2456484 Bytes 2 3 MiB Load Address 80008000 Entry Point 80008000 Verifying Checksum OK Loading Kernel Image OK OK Starting kernel Uncompressing Linux done booting the kernel Linux version 2 6 37 jwhit jimi gcc version 4 3 3 Sourcery G Lite 2009q1 20 3 3 Tue Jul 2 03 01 49 CDT 2013 CPU ARMv7 Processor 413fc082 revision 2 ARMv7 cr 10c53c7f CPU VIPT nonaliasing data ...

Страница 41: ... 1 active controller GPMC revision 6 0 Trying to install interrupt handler for IRQ368 Trying to install interrupt handler for IRQ369 Trying to install interrupt handler for IRQ370 Trying to install interrupt handler for IRQ371 Trying to install interrupt handler for IRQ372 Trying to install interrupt handler for IRQ373 Trying to install interrupt handler for IRQ374 Trying to install type control f...

Страница 42: ...sb usb1 Manufacturer Linux 2 6 37 musb hcd usb usb1 SerialNumber musb hdrc 0 hub 1 0 1 0 USB hub found hub 1 0 1 0 1 port detected musb hdrc musb hdrc 0 USB Host mode controller at d701e000 using DMA IRQ 18 musb hdrc musb hdrc 1 dma type dma cppi41 MUSB controller 1 revision 4ea20800 musb hdrc musb hdrc 1 MUSB HDRC host driver musb hdrc musb hdrc 1 new USB bus registered assigned bus number 2 usb ...

Страница 43: ...pmp pio slum part ccc scsi0 ahci_platform scsi1 ahci_platform ata1 SATA max UDMA 133 mmio mem 0x4a140000 0x4a150fff port 0x100 irq 16 ata2 SATA max UDMA 133 mmio mem 0x4a140000 0x4a150fff port 0x180 irq 16 omap2 nand driver initializing NAND device Manufacturer ID 0xec Chip ID 0xd3 Samsung Scanning device for bad blocks Bad eraseblock 6216 at 0x000030900000 Bad eraseblock 6405 at 0x0000320a0000 Cr...

Страница 44: ...e registered new interface driver uvcvideo USB Video Class driver v1 0 0 Software Watchdog Timer 0 07 initialized soft_noboot 0 soft_margin 60 sec nowa yout 1 usbcore registered new interface driver usbhid usbhid USB HID core driver notify_init notify drivercreated for remote proc id 2 at physical Address 0xb f900000 asoc tlv320aic3x hifi davinci mcasp 2 mapping ok asoc HDMI DAI CODEC hdmi dai map...

Страница 45: ... interfaces done Wed Dec 2 18 59 00 UTC 2009 Loading HDVICP2 Firmware SysLink version 2 20 02 20 SysLink module created on Date Jul 2 2013 Time 02 51 29 FIRMWARE Memory map bin file not passed Usage firmware_loader Processor Id Location of Firmware start stop mmap memory_map_file i2c 0 1 Mandatory arguments Processor Id 0 DSP 1 Video M3 2 Vpss M3 Location of Firmware firmware binary file start sto...

Страница 46: ...e i2c 0 1 Mandatory arguments Processor Id 0 DSP 1 Video M3 2 Vpss M3 Location of Firmware firmware binary file start stop to start stop the firmware Optional arguments mmap input memory map bin file name i2c 0 i2c init not done by M3 1 default i2c init done by M 3 FIRMWARE isI2cInitRequiredOnM3 0 FIRMWARE Default memory configuration is used Firmware Loader debugging not configured Default FL_DEB...

Страница 47: ...s 5 Video Resolution DeinterlaceInput 7 Video De interlace 8 Rate Control VBR 9 Video Bitrate 8000k A Video Profile High B Video Frame Rate 60 C Gop Size 60 Frames D Video Burst Size 1000ms E B Frame GOP Structure open IBB F B Frame Interval 3 G Audio Delay 0 H Video Delay 0 I Video Codec J Output Interface ETH K Video Passthru HDMI L Output Format RTP M Dest IP Address 225 1 2 3 N Dest Port 8888 ...

Страница 48: ...DM8168 PCI RPS IP address from the Linux PC Try pinging the Linux PC from the Z3 DM8168 PCI RPS Problem Do not see video in VLC UDP Does the IP address set in Dest IP Address equal the IP address of the PC running VLC Does the port number in Dest Port equal the value entered in the URL for VLC Is the PC fast enough for 1080p decode on VLC Does the PC have enough DDR to handle 1080p decode on VLC I...

Страница 49: ...in etc exports match the IP address set in nfsserver in u boot Does the value of nfs_root in u boot point to z3 netra filesys fs Did you start the NFS server If you modified the exports file did you remember to restart the NFS server after that When contacting Z3 Support for additional support please capture and include a log file with the diagnostic level set to analysis Note Our Express Limited ...

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