YOKOGAWA FA-M3V e-RT3 Plus, Руководство по оборудованию

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A2-51
IM 34M06C11-01E
(15) F3YD04-7N Transistor Output Module
Item Specifications Item Specifications
Output type Transistor contact
Service life
Mechanical
─
Number of points 4 Electrical
─
Common line type All points independent Surge protector *1 Zener diode
Isolation method Photocoupler isolation Fuse *2
3.15A time-lag fuse
(Built into each type-N
terminal and cannot be
replaced.)
Withstanding voltage
1500V AC for one minute
between the group of
connectors for external
connection and the
internal circuit
Dissipating current 85mA (5V DC)
Output display *3 LED (Lit when output is on)
Rated load Voltage
(Operating load
voltage range)
DC 24V DC
(20.4 to 26.4V DC)
Output status when the
program stops
HOLD/RESET *4
When a sequence CPU
module is used:
Default: RESET
Can be set globally on a
module-by-module basis.
AC ─
Maximum load current 2A/point When a BASIC CPU module
is used:
No setting function
The status is always HOLD
Response
time
OFF → ON 5ms max.
ON → OFF 3ms max. External power supply Not required.
ON voltage 0.5V DC max. External connection
10-point terminal block with
M3.5 screws
Off-time leak current 0.1mA max. Weight 140g
*1: If an inductive load, such as a relay, is to be connected, a surge protector is also required on the load side. Connect
a surge protector or a diode across the load nearby so that the module output terminal voltage will not exceed the
specified operating load voltage range. For details, see Subsection A3.6.5, “Connecting Output Devices.”
*2: Fuses in the output module are for the purpose of preventing abnormal heat generation or burnout of external wiring
due to continuous flow of excess short-circuit current resulting from a short-circuited load.
They are not intended for protecting output elements in the module against possible damage.
The fuses may fail to blow in failure modes other than short-circuited loads.
*3: The contact operation of the output block of the circuit and the LED display operate independently and thus may be
inconsistent in the event of an error.
*4: For information on the module’s behavior during a CPU failure, see subsection A4.3.3, “Indicating Problem Severity
and Status of Output Module.”

Front View
1
2
3
4
L
1
2
L
3
L
4
LL
LL
YD04-7N DC OUT
F3YD04-7N
FA020544.VSD

Internal Circuit Configuration
1P
1N
L
+
–
In
te
rn
al
B
us
Bus
Interface
FA020545.VSD

External Connection Diagram
1
2
3
4
5
6
7
8
9
10
L
+
–
1P
1N
L
+
–
2P
2N
L
+
–
3P
3N
L
+
–
4P
4N
1
2
3
4
5
6
7
8
9
10
+
–
1P
1N
+
–
2P
2N
+
–
3P
3N
+
–
4P
4N
L
L
L
L
FA020546.VSD