Yamaha HTR-5065, Руководство по обслуживанию

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Pin
No.
Port Name
Function Name
(P.C.B.)
I/O
Detail of Function
PO
WER ON
S
T
ANDB
Y
52 P5_5/N_HOLD E8A_N_EPM I- I-
53 P5_4/N_HLDA HP_N_DET I+ O Headphone detection / L: Headphone detected
54 P13_3 HPRY O O Headphone relay control
55 P13_2 SPRY_SB_BA O O Speaker relay control (Surround back and Bi-Amp) / H: Relay ON
56 P13_1 (no_use)
57 P13_0 SPRY_5CH O O Speaker relay control (Front / Center / Surround) / H: Relay ON
58 P5_3/BCLK MT_N_SB O O Mute control (Surround back)
59 P5_2/N_RD (no_use)
60 P5_1/N_WRH/N_BHE MT_N_5CH O O Mute control (Front / Center / Surround)
61 P5_0/N_WRL/N_WR E8A_N_CE I+ I+
62 P12_7 OSDFS_N_CS O O Chip select control of OSD Flash from microprocessor
63 P12_6 USB_VBUS_PON O O
64 P12_5 PRY O O Power relay control / H: ON
65 P4_7/PWM1/TXD7/SDA7/N_CS3 FPGA_MOSI SO O FPGA, OSD Flash synchronization data output
66 P4_6/PWM0/RXD7/SCL7/N_CS2 FPGA_MISO SI O FPGA, OSD Flash synchronization data input
67 P4_5/CLK7/N_CS1 FPGA_SCK SO O FPGA, OSD Flash synchronous clock output
68 P4_4/N_CTS7/N_RTS7/N_CS0 FPGA_N_CS O O FPGA chip select
69 P4_3/A19 (reserved) O O
70 P4_2/A18 FLSH_N_CS O O Expansion FlashROM chip select / FPGA FlashROM chip select
71 P4_1/A17 N_FCT I I FCT detection / H: Product mode, L: FCT mode
72 P4_0/A16 NDAC_N_MT O O Mute control
73 P3_7/A15 OSDFS_BUS_SEL O O L: ROHM Apple / FPGA SPI / H: Spalta OSD SPI
74 P3_6/A14 VOL_RB I+ I+ Volume rotary encoder B
75 P3_5/A13 VOL_RA I+ I+ Volume rotary encoder A
76 P3_4/A12 FLD_N_CS O O FL driver chip select
77 P3_3/A11 FLD_N_RST O O FL driver reset
78 P3_2/A10 MIC_N_DET I- I- MIC detection / L: MIC detected
79 P3_1/A9 STBY_LED O O Standby through LED / H: LED lighting
80 P12_4 NCPU_PON O O H: Power supply ON
81 P12_3 DSP_PON O H: Power supply ON
82 P12_2 +3.3S_PON O H: Power supply ON
83 P12_1 HDMI_PON O H: Power supply ON
84 P12_0 VID_PON O H: Power supply ON
85 VCC2 VCC2 MCU MCU Microprocessor power supply
86 P3_0/A8 EEP_N_CS O O EEPROM chip select
87 VSS VSS MCU MCU Microprocessor ground
88 P2_7/AN2_7/A7 USB_IPLERR I+ I+ USB IPL error status detection / Port input pull-down
89 P2_6/AN2_6/A6 USB_BUSY I+ I Condition output from USB device
90 P2_5/N_INT7/AN2_5/A5 REM_IN IRQ IRQ Remote control pulse input
91 P2_4/N_INT6/AN2_4/A4 PSW_N_DET IRQ IRQ Power system switch (Power, Scene) detection
L: STANDBY key ON
92 P2_3/AN2_3/A3 DSP_N_RST O O DSP reset
93 P2_2/AN2_2/A2 DSP_N_RDY I+ O DSP ready input
94 P2_1/AN2_1/A1 DSP_N_CS O O DSP chip select
95 P2_0/AN2_0/A0 DSP_FMT O O DSP full mute output / H: Mute
96 P1_7/N_INT5/IDU/D15 USB_SEARCH I- I- Condition output from USB device
97 P1_6/N_INT4/IDW/D14 NCPU_VBUSDRV I- I- USB power supply output demand from NET microprocessor
98 P1_5/N_INT3/IDV/D13 USB_MCHNG IRQ USB file reproduction end flag input
99 P1_4/D12 USB_N_RST O O USB device • reset
100 P1_3/TXD6/SDA6/D11 NCPU_SPI_MOSI SO O NET SPI data output
101 P1_2/RXD6/SCL6/D10 NCPU_SPI_MISO SI O NET SPI data input
102 P1_1/CLK6/D9 NCPU_SPI_SCK O O NET SPI clock output
103 P1_0/N_CTS6/N_RTS6/D8 NCPU_SPI_N_CS O O NET SPI chip select
Key detection for A/D port
Key input (A/D) pull-up resistance: 10 k-ohms
Destination detection for A/D port
Pull-up resistance: 10 k-ohms
Pin
No.
Port Name
Function Name
(P.C.B.)
I/O
Detail of Function
PO
WER ON
S
T
ANDB
Y
104 P0_7/AN0_7/D7 DAC_N_CS O O DAC chip select
105 P0_6/AN0_6/D6 NCPU_AMUTE I O NET audio mute demand
106 P0_5/AN0_5/D5 PS3_PRT AD PS protection detection 3
107 P0_4/AN0_4/D4 PS2_PRT AD PS protection detection 2
108 P0_3/AN0_3/D3 L3_DET AD I D terminal L3 detection
109 P0_2/AN0_2/D2 USB_VBUS_PRT AD I USB iPad power supply feedback
110 P0_1/AN0_1/D1 THM3 AD I Temperature detection 3
111 P0_0/AN0_0/D0 DEST AD I Model distinction
112 P11_7 NCPU_N_RST O O
113 P11_6 DIR_SDO I O DIR_SDO input for CDDA writing
114 P11_5 DIR_WCK I O DIR_WCK input for CDDA writing
115 P11_4 (reserved) O O
116 P11_3 VIDI2C_ON O O Vdec and A-video selector I2C line control
117 P11_2 FPGA_N_CFG O O FPGA configuration control
118 P11_1 FPGA_N_STA I O FPGA configuration status
119 P11_0 FPGA_CDONE I O FPGA configuration completion signal
120 P10_7/AN7/N_K13 DC_PRT AD I Power amp DC detection
121 P10_6/AN6/N_K12 AMP_OLV AD I Power amp output level detection
122 P10_5/AN5/N_K11 THM1 AD I Temperature detection 1
123 P10_4/AN4/N_K10 THM2 AD I Temperature detection 2
124 P10_3/AN3 KEY2 AD I KEY AD value uptake 2
125 P10_2/AN2 KEY1 AD I KEY AD value uptake 1
126 P10_1/AN1 PS1_PRT AD I PS protection detection 1
127 AVSS AVSS MCU MCU Microprocessor ground
128 P10_0/AN0 (no_use) O O AD spare
0 Ω + 1.0 kΩ + 1.0 kΩ + 1.5 kΩ + 1.8 kΩ + 2.2 kΩ +3.3 kΩ + 4.7 kΩ + 6.8 kΩ + 10 kΩ + 22 kΩ + 68 kΩ
Detected voltage value
at 124 pin
0 –
0.15 V
0.15 –
0.425 V
0.425 –
0.703 V 0.703 –
0.999 V 0.999 –
1.279 V
1.279 –
1.564 V 1.564 –
1.86 V
1.86 –
2.142 V
2.142 –
2.399 V
2.399 –
2.653 V 2.653 –
2.919 V 2.916 –
3.175 V
A/D value
(3.3 V=255)
0 – 11 12 – 32 33 – 54 55 – 77 78 – 98 99 – 120 121 – 143 144 – 165 166 – 185 186 – 205 206 – 225 226 – 245
KEY2 DIRECT
TUNING
>>
TUNING
<<
AM FM
PRESET
>
PRESET
<
MEMORY INFO STRAIGHT
PROGRAM
>
PROGRAM
<
0 Ω + 1.0 kΩ + 1.0 kΩ + 1.5 kΩ + 1.5 kΩ + 2.2 kΩ +3.3 kΩ + 4.7 kΩ + 13.2 kΩ + 22 kΩ + 33 kΩ
Detected voltage value
at 125 pin
0 –
0.15 V
0.15 –
0.425 V
0.425 –
0.703 V 0.703 –
0.978 V 0.978 –
1.241 V
1.241 –
1.536 V 1.536 –
1.84 V
1.84 –
2.102 V
2.102 –
2.299 V
2.336 –
2.55 V
2.55 –
2.971 V
A/D value
(3.3 V=255)
0 – 11 12 – 32 33 – 54 55 – 75 76 – 95 96 – 118 119 – 142 143 – 162 163 – 177 181 – 197 198 – 229
KEY1
RADIO
(SCENE4)
NET
(SCENE3)
TV
(SCENE2)
BD/DVD
(SCENE1)
— —
INPUT
>
INPUT
<
—
(power)
TONE
CONTROL
R5418
on OPERATION P.C.B.
0 Ω 1.2 kΩ 2.7 kΩ 4.7 kΩ 6.8 kΩ 10 kΩ 15 kΩ 47 kΩ 100 kΩ
Detected voltage value
at 111 pin
0 –
0.162 V
0.162 –
0.517 V 0.517 –
0.872 V
0.872 –
1.193 V
1.193 –
1.492 V
1.492 –
1.816 V 1.816 –
2.2 V
2.572 –
2.869 V 2.869 –
3.163 V
A/D value 000 111 222 333 444 555 666 777 888
Destination J U C R, S T K A B, G, F L, H
RX-V573/HTR-5065
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