Yamaha AW2816, Руководство по обслуживанию

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37
AW2816
LSI PIN DESCRIPTION
S1D13305F00B100 (XQ595A00) LCDC (LCD Controller) .... 37
HD6437042AG12F (X0592A00) CPU .................................... 38
HD6437042AF65F (XW647A00) CPU ................................... 38
YSS910-S (XV988A00) DSP6 (Digital Signal Processor) .... 39
YSS919-H (XZ693A00) DSP7 (Digital Signal Processor) ... 40
CI-DRC (XY629A00) Gate Array .......................................... 41
LR38791 (XY631A00) Gate Array ......................................... 42
LR38792 (XY630A00) Gate Array ......................................... 43
S1R72104F00A100 (XY625A00) SCSI Control .................... 44
AK4528VF (XY624A00) ADC/DAC ........................................ 45
MBCG46183-129 (XV833A00) Gate Array ........................... 45
DS12887 (XV618A00) Real Time Clock ................................ 45
YM3436DK (XG948E00) DIR2
(Digital Format Interface Receiver) ..................................... 46
YM3437C-F
(XM530A00) DIT2
YM3437C-FE2
(XW060A00) DIT2
(Digital Format Interface Transmitter) .................................
46
PIN
NO.
I/O FUNCTION NAME
PIN
NO.
I/O FUNCTION NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
VA5
VA4
VA3
VA2
VA1
VA0
/VWR
/VCE
/VRD
/RES
NC
NC
/RD
/WR
SEL2
SEL1
XG
XD
/CS
A0
V
DD
D0
D1
D2
D3
D4
D5
D6
D7
XD3
O
O
O
O
O
O
O
O
I
I
I
I
I
I
O
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
VRAM address bus
VRAM read/write
Memory control
Not used
Initial clear
Not used
Not used
Read strobe
Write strobe
Bus select
Bus select
Clock
Clock
Chip select
Data mode select
Power supply
Data bus
Data bus output for 4 bit dot
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60 XD2
XD1
XD0
XECL
XSCL
Vss
LP
WF
YDIS
YD
YSCL
VD7
VD6
VD5
VD4
VD3
VD2
VD1
VD0
VA15
VA14
VA13
VA12
VA11
VA10
VA9
VA8
VA7
VA6
NC
O
O
O
O
O
O
O
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
Data bus output for 4 bit dot
S driver enable, chain clock
Data bus shift clock
Ground
X driver latch pulse
Frame signal for X/Y driver
Power down signal for displaying off mode
Scan start signal
Scan shift clock
VRAM data bus
VRAM address bus
Not used
S1D13305F00B100 (XQ595A00) LCDC (LCD Controller)
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