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XVME-400/40l/490/491 Manual
October, 1989
Chapter 3
MODULE PROGRAMMING
3.1 INTRODUCTION
This chapter will discuss the addressing and initialization procedures for programming
the XVME-400/40l/490/491 Modules. In order to demonstrate the correct sequence of
initialization for the serial channels contained in the SCC chips, two programming
examples (with comments) have been incorporated in this chapter. For a complete
explanation of how to program and maximize the functionality of the SCC chip, refer to
the accompanying SCC Manual.
.
Each module contains four serial communication channels, designated as channels 0, 1,2,
and 3. Each SCC has two serial channels designated by Zilog as channels A and B. The
SCC channels map into the module channels as follows:
Module Channel Number SCC Channel
Priority
0
SCC #1, Channel A
1
SCC #1, Channel B
2 SCC #2, Channel A
3 SCC #2, Channel B
Highest
Lowest
Throughout this document, the module channel number (0, 1, 2, 3) will be referenced.
For interrupt operation, the serial channels are prioritized, with channel 0 having the
highest priority and channel 3 having the lowest priority. Therefore, for a given
application, the serial links running at higher data rates should be assigned to module
channels with higher interrupt priority.
3.2 MODULE
ADDRESSING
The XVME-400/401/490/491 Modules are designed to be addressed within the VMEbus-
defined 64 Kbyte short I/O address space. When the XVME-400/401/490/491 Module is
installed in the system it will occupy a 1 Kbyte block of the short I/O address space. The
base address decoding scheme for the XVME I/O modules is such that the starting address
for each board resides on a 1 Kbyte boundary. Thus, there are 64 possible locations (1
Kbyte boundaries) in the short I/O address space which could be used as the base address
for the XVME-400/401/490/491 Module. (Refer to Section 2.4.1 for the list of base
addresses and their corresponding jumper configurations).
All register locations within the SCC devices are given specific addresses which are offset
from the module base address. Thus, a specific register address in one of the SCC chips
can be accessed by adding the specific register offset to the module base address. For
example, the offset specified for the Serial Channel 2 Data Register is 07H, and if the
module base address is jumpered to 1OOOH,
the register can be accessed at 1007H.
3-1