Xycom XVME-113, Руководство пользователя

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Chapter 3 – Real Time Clock
3-2
3.2
REAL TIME CLOCK/READABLE BANK INFORMATION ADDRESS MAP
All writes and reads to the Real Time Clock are at odd memory locations (D7-D0). The Real Time Clock uses 16 registers,
and the remaining odd memory locations in the 1K address space are shadowed on 32 byte blocks. Table 3-1, shows the
location of the registers.
The device type and size for the two banks are readable at even locations (D15-D8) in the same Short I/O address space as
the Real Time Clock. This is readable only and is shadowed 1K times. Table 3-1 shows register addressing and Table 3-2
shows data bit definitions.
Table 3-1. Register Addressing
Offset from 1K Base
Address
Real Time Clock/Configuration Register
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
10
11
12
13
14
15
16
17
18
19
1A
1B
1C
1D
1E
1F
20
21
.
.
.
Configuration Reg.
RTC Register 1
Configuration Reg.
RTC Register 3
Configuration Reg.
RTC Register 5
Configuration Reg.
RTC Register 7
Configuration Reg.
RTC Register 9
Configuration Reg.
RTC Register B
Configuration Reg.
RTC Register D
Configuration Reg.
RTC Register F
Configuration Reg.
RTC Register 11
Configuration Reg.
RTC Register 13
Configuration Reg.
RTC Register 15
Configuration Reg.
RTC Register 17
Configuration Reg.
RTC Register 19
Configuration Reg.
RTC Register 1B
Configuration Reg.
RTC Register 1D
Configuration Reg.
RTC Register 1F
Same as 00
Same as 01
.
.
.