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Xilinx Zynq-7000 Скачать руководство пользователя страница 35

ZC702 and ZVIK Getting Started Guide

35

UG926 (v6.0) December 17, 2013

Running the Qt-Based GUI Application Demonstration

Video source control modes are explained as follows:

• TPG interference

°

The input video is generated by the TPG IP implemented in the PL.

• External video (available with the optional ZVIK FMC module)

°

The input video is supplied by an external video source and is connected through

the FMC-IMAGEON card.

Sobel filter modes are explained as follows:

Sobel OFF

• No processing done. Sobel filter is bypassed.

Sobel – SW

• Video processing (edge-detection filter) done by software code running on the PS.
• Observe CPU utilization going up to 100% for one of the two CPUs (this can be seen in

the CPU usage graph). In this mode, the frame rate of the video also drops to about

3 fps to 10 fps depending upon resolution.

Sobel – HW

• Video processing (edge-detection filtering) done by PL.
• Observe CPU utilization going down (to approximately 0%) and the frame rate jumping

to 60 fps.

shows the detected image edges of the video generated by the TPG, that is, case

1 versus case 2 or 3 of

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Содержание Zynq-7000

Страница 1: ...t applies to the following software versions Vivado Design Suite 2013 3 and 2013 4 This document applies to the following software versions Vivado Design Suite 2013 3 and 2013 4 This document applies...

Страница 2: ...terms and conditions of the Limited Warranties which can be viewed at http www xilinx com warranty htm IP cores may be subject to warranty and support terms contained in a license issued to you by Xi...

Страница 3: ...ection Zynq 7000 AP SoC Video and Imaging Kit Contents page 10 Photos are updated in Figure 1 3 Feature Callout for the ZC702 Board and Figure 2 2 ZC702 with the UART and Power Cable Attached The TRD...

Страница 4: ...eo Resolution page 38 the instructions were updated for running QT based GUI in 720p mode and running the UART Menu based Demonstration Application in 720p mode 08 12 13 5 0 Draft Updated document for...

Страница 5: ...etup 16 Hardware Bring Up 17 Run the BIST Application 22 Chapter 3 Getting Started with the Base Targeted Reference Design Introduction 25 Base TRD Key Features 27 Base TRD Hardware Setup Requirements...

Страница 6: ...www xilinx com ZC702 and ZVIK Getting Started Guide UG926 v6 0 December 17 2013 Appendix A Additional Resources Xilinx Resources 47 Solution Centers 47 References 47 Appendix B Warranty Send Feedback...

Страница 7: ...n power up The tutorials and reference designs available on the Zynq 7000 AP SoC ZC702 Evaluation Kit documentation page can be used to further explore the capabilities of the ZC702 board and the Zynq...

Страница 8: ...RD based on Zynq 7000 AP SoC architecture The Base TRD showcases various features and capabilities of the Zynq Z 7020 AP SoC for the embedded domain in a single package TRDs are key components of the...

Страница 9: ...er for an evaluation IP license for the Video IP AMS demonstration providing an overview of the analog capabilities of the Zynq 7000 AP SoC devices 12V AC adapter power supply Cables RJ 45 Ethernet ca...

Страница 10: ...d IR cut filter Camera tripod Lens holder Cables Second HDMI cable LCEDI image sensor cable For reference design files documents and board source files go to the Zynq 7000 AP SoC Video and Imaging Kit...

Страница 11: ...oard FMC1 LPC Connector Xilinx XADC Header UG926_c1_03_111913 FMC2 LPC Connector 8 User LEDs User 2 Pole DIP Switch Zynq 7000 AP SoC Power Management System Bottom and Top of Board FPGA PROG Pushbutto...

Страница 12: ...and ZVIK Getting Started Guide UG926 v6 0 December 17 2013 X Ref Target Figure 1 4 Figure 1 4 Default Jumper and Switch Settings on the ZC702 Board UG926_c1_04_021213 1 8 9 7 SW11 Down Off 2 3 4 6 5...

Страница 13: ...3 Right 4 Right 5 Right SW11 power slide switch Off 8 1 Down Table 1 2 Default Jumper Settings Jumper Function Default Position Figure 1 4 Callout HDR_1 X 2 J5 CFGBVS short to GND OFF 4 J6 POR Master...

Страница 14: ...PHY HDR 1 2 7 J31 Ethernet PHY HDR NONE 7 J32 Ethernet PHY HDR NONE 7 J33 USB 2 0 Mode 2 3 6 J34 USB 2 0 J1 ID SEL 1 2 7 J35 USB 2 0 J1 VBUS CAP SEL 1 2 6 J36 USB 2 0 J1 GND SEL 1 2 7 J37 XADC_VREP SE...

Страница 15: ...This exercise of running the BIST demonstration should take approximately 10 to 15 minutes Note For a description of all the features on the ZC702 board see ZC702 Evaluation Board for the Zynq 7000 XC...

Страница 16: ...ns for board bring up ZC702 Evaluation Board Setup The default jumper and switch settings of the ZC702 board are shown in Figure 1 4 Table 1 1 and Table 1 2 1 Set the SW16 switch as shown in Figure 2...

Страница 17: ...702 board switched OFF SW11 in the down position as shown in Figure 1 4 plug the USB Mini B cable into the Mini USB port J17 labeled USB UART on the ZC702 board and the other end into a open USB port...

Страница 18: ...wn COM Port and baud rate in the Device Manager a Left click Start Menu and select Control Panel in Windows 7 b Select Device Manager on the left side c Right click the Silicon Labs device in the list...

Страница 19: ...ide www xilinx com 19 UG926 v6 0 December 17 2013 Hardware Bring Up Figure 2 4 through Figure 2 6 show the steps for setting the USB UART port X Ref Target Figure 2 4 Figure 2 4 Configuring the Driver...

Страница 20: ...C702 Evaluation Kit Built In Self Test 20 www xilinx com ZC702 and ZVIK Getting Started Guide UG926 v6 0 December 17 2013 X Ref Target Figure 2 5 Figure 2 5 UART Port Setting Tab UG926_c2_05_061212 Se...

Страница 21: ...2 and ZVIK Getting Started Guide www xilinx com 21 UG926 v6 0 December 17 2013 Hardware Bring Up X Ref Target Figure 2 6 Figure 2 6 Select a COM Port between COM1 and COM4 UG926_c2_06_061212 Send Feed...

Страница 22: ...n the terminal window Figure 2 7 3 Select each relevant test and observe the test results For more information on the BIST software and additional tutorials including how to restore the default conten...

Страница 23: ...Run the BIST Application TIP If any of the BIST tests fail check the settings of the switches and jumpers as shown in Figure 1 4 Table 1 1 and Table 1 2 If these settings are correct and the test stil...

Страница 24: ...Chapter 2 ZC702 Evaluation Kit Built In Self Test 24 www xilinx com ZC702 and ZVIK Getting Started Guide UG926 v6 0 December 17 2013 Send Feedback...

Страница 25: ...In this design the Zynq 7000 AP SoC performs real time processing of a 1080p60 video stream either in Processing System PS software or Programmable Logic PL hardware accelerator The video processing p...

Страница 26: ...ive tasks onto PL thereby freeing the CPU resources to be available for user specific applications The ZC702 evaluation kit and ZVIK come with an SD card loaded with binaries that enable the user to r...

Страница 27: ...SD MMC and GPIO Clocks and reset for PL High bandwidth interconnect between PS and PL The PL includes Two AXI interconnects 64 bit wide at 150 MHz One AXI interconnect 32 bit wide at 75 MHz AXI VDMA s...

Страница 28: ...es from the ready_to_test directory to the SD card USB Micro B to female A adapter A USB hub is needed for connecting a keyboard and mouse not included with the kit If a USB hub is not available it is...

Страница 29: ...ce must be 1080P 60 Hz and must not deliver content with copy protection or Digital Rights Management DRM enabled Many DVD and media players output content with DRM enabled even if the content is not...

Страница 30: ...FMC IMAGEON FMC module on the ZC702 base board and support the free end of the board Assemble the hardware as shown in Figure 3 3 Use the longer standoffs screws and rubber feet for the free end of t...

Страница 31: ...doffs and four short screws as shown in Figure 3 3 Use the two long standoffs four longer screws and rubber feet to support the free end of the board Connect an external video source to the FMC module...

Страница 32: ...set as shown in Figure 3 4 which allows the ZC702 board to boot from the SD MMC card 5 Make sure the display monitor is set for HDMI or DVI 1920 x 1080 Running the Qt Based GUI Application Demonstrat...

Страница 33: ...LINX ZYNQ banner appears on the display monitor after approximately two minutes as shown in Figure 3 5 4 The Qt based video demonstration application starts The GUI application shows up at the bottom...

Страница 34: ...The user can also control transparency of the GUI with the Transparency slider 6 Click Enable Video to start the internal Test Pattern Generator TPG which displays on the monitor 7 Exercise different...

Страница 35: ...ained as follows Sobel OFF No processing done Sobel filter is bypassed Sobel SW Video processing edge detection filter done by software code running on the PS Observe CPU utilization going up to 100 f...

Страница 36: ...monstration is also provided with the package This application presents the user with a command line menu based UI to exercise different modes of the video demonstration To run the menu based UI appli...

Страница 37: ...layed in Table 3 2 against Enter your choice on the terminal Video source control modes are explained as follows TPG interference The input video is generated by the TPG IP implemented in the PL X Ref...

Страница 38: ...case 1 versus case 2 or 3 of Table 3 2 3 Enter 0 to exit the application and return to the command prompt Running the Video Demonstration for 720p Video Resolution Configure the display monitor to 72...

Страница 39: ...v6 0 December 17 2013 Running the Video Demonstration for 720p Video Resolution For additional example designs tutorials software and other information related to the ZVIK see Next Steps for the Zynq...

Страница 40: ...Chapter 3 Getting Started with the Base Targeted Reference Design 40 www xilinx com ZC702 and ZVIK Getting Started Guide UG926 v6 0 December 17 2013 Send Feedback...

Страница 41: ...linearization calibration over sampling and filtering The ZC702 evaluation kit includes the hardware and software to evaluate this ADC feature and to determine its usefulness in the user s end system...

Страница 42: ...ments LabVIEW RunTime Engine needed to host the AMS Evaluator tool The GUI itself has been built using National Instruments LabVIEW 2011 software To enable use of the GUI without the need for a LabVIE...

Страница 43: ...4 c Power on the ZC702 board After about 15 seconds the Done LED DS3 turns green indicating the design file on the SD MMC card has properly loaded onto the Zynq 7000 AP SoC 3 Run the AMS101 Evaluator...

Страница 44: ...xplanation of the AMS101 evaluation card refer to the AMS101 Evaluation Card User Guide UG886 Ref 7 For a more extensive explanation of the AMS targeted reference design for ZC702 refer to the 7 Serie...

Страница 45: ...orage see the Zynq 7000 AP SoC ZC702 Evaluation Kit product page Next Steps for the Zynq 7000 AP SoC Video and Imaging Kit ZVIK For more information on additional example designs including a camera de...

Страница 46: ...Chapter 5 Next Steps 46 www xilinx com ZC702 and ZVIK Getting Started Guide UG926 v6 0 December 17 2013 Send Feedback...

Страница 47: ...ters for support on devices software tools and intellectual property at all stages of the design cycle Topics include design assistance advisories and troubleshooting tips References The most up to da...

Страница 48: ...7000 XC7Z020 All Programmable SoC User Guide UG850 5 Tera Term home page 6 Silicon Labs USB UART drivers page 7 AMS101 Evaluation Card User Guide UG886 8 7 Series FPGA AMS Targeted Reference Design Us...

Страница 49: ...lect or default of Customer For any breach by Xilinx of this limited warranty the exclusive remedy of Customer and the sole liability of Xilinx shall be at the option of Xilinx to replace or repair th...

Страница 50: ...50 www xilinx com ZC702 and ZVIK Getting Started Guide UG926 v6 0 December 17 2013 Appendix B Warranty Send Feedback...

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