HDMI 1.4/2.0 TX Subsystem
49
PG235 October 4, 2017
Chapter 4
Design Flow Steps
This chapter describes customizing and generating the subsystem, constraining the
subsystem, and the simulation, synthesis and implementation steps that are specific to this
IP subsystem. More detailed information about the standard Vivado® design flows and the
IP integrator can be found in the following Vivado Design Suite user guides:
•
Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator
(UG994)
•
Vivado Design Suite User Guide: Designing with IP
(UG896)
•
Vivado Design Suite User Guide: Getting Started
(UG910)
•
Vivado Design Suite User Guide: Logic Simulation
(UG900)
Customizing and Generating the Subsystem
This section includes information about using Xilinx tools to customize and generate the
subsystem in the Vivado Design Suite.
The HDMI 1.4/2.0 Transmitter Subsystem can be added to a Vivado IP integrator block
design in the Vivado Design Suite and can be customized using IP catalog. For more
detailed information on customizing and generating the subsystem in the Vivado IP
integrator, see the
Vivado Design Suite User Guide: Designing IP Subsystems using IP
Integrator
(UG994)
. IP integrator might auto-compute certain configuration values
when validating or generating the design. To check whether the values do change, see the
description of the parameter in this chapter. To view the parameter value, run the
validate_bd_design
command in the Tcl Console.
You can customize the subsystem for use in your design by specifying values for the various
parameters associated with the IP subsystem using the following steps:
1. In the
Flow Navigator
, click on
Create Block Diagram
or
Open Block Design
under the
IP Integrator heading.
2. Right click in the diagram and select
Add IP
.
A searchable IP catalog opens. You can also add IP by clicking on the Add IP button on
the left side of the IP Integrator Block Design canvas.
