Xilinx ChipScope Pro, Руководство пользователя

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ChipScope Pro Software and Cores User Guide www.xilinx.com 43
UG029 (v14.3) October 16, 2012
ChipScope Pro Core Inserter Features
checkbox. A block diagram of the trigger sequencer is shown in Figure 3-5 .
The trigger sequencer is implemented as a simple cyclical state machine and can transition
through up to 16 states or levels before the trigger condition is satisfied. The transition
from one level to the next is caused by an event on one of the match units that is connected
to the trigger sequencer. Any match unit can be selected at runtime on a per level basis to
transition from one level to the next. The trigger sequencer can be configured at runtime to
transition from one level to the next on either contiguous or non-contiguous sequences of
match function events.
Enabling the Storage Qualification Condition
In addition to the trigger condition, the ILA core can also implement a storage qualification
condition . The storage qualification condition is a Boolean combination of match function
events. These match function events are detected by the match unit comparators that are
subsequently attached to the trigger ports of the core. The storage qualification condition
differs from the trigger condition in that it evaluates trigger port match unit events to
decide whether or not to capture and store each individual data sample. The trigger and
storage qualification conditions can be used together to define when to start the capture
process and what data to capture. The storage qualification condition can be enabled by
checking the
Enable Storage Qualification checkbox.
Enabling the Trigger Output Port
The trigger output port of the ILA core trigger condition module cannot be enabled in the
ChipScope Pro Core Inserter tool. It can only be enabled by using the CORE Generator™
tool.
Choosing ILA Core Capture Parameters
The second tab in the ChipScope Pro Core Inserter is used to set up the capture parameters
of the ILA core.
Selecting the Data Depth
The maximum number of data sample words that the ILA core can store in the sample
buffer is called the
data depth . The data depth determines the number of data width bits
contributed by each block RAM unit used by the ILA unit. The CORE Generator and
ChipScope Pro Core Inserter have a resource utilization estimator feature that indicates
exactly how many block RAM resources are used for a given combination of data width
and data depth parameters.
X-Ref Target - Figure 3-5
Figure 3-5: Trigger Sequencer Block Diagram with 16 Levels and 16 Match Units
Match Unit 0
Match Unit 1
Match Unit 2
Match Unit 15
Level
1
Match Unit 0
Match Unit 1
Match Unit 2
Match Unit 15
Level
2
Match Unit 0
Match Unit 1
Match Unit 2
Match Unit 15
Level
16
Trigger
UG029_trig_seq_blk_diag_081903