WIN Enterprises PL-80930, Руководство пользователя

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Disabled
AtomicOp Requester Enable
If supported by hardware and set to 'Enabled', this function initiates AtomicOp
Requests only if Bus Master Enable bit is in the Command Register Set.
AtomicOp Egress Blocking
If supported by hardware and set to 'Enabled', outbound AtomicOp Requests via
Egress Ports will be blocked.
IDO Request Enable
If supported by hardware and set to 'Enabled', this permits setting the number of
ID-Based Ordering (IDO) bit (Attribute[2]) requests to be initiated.
IDO Completion Enable
If supported by hardware and set to 'Enabled', this permits setting the number of
ID-Based Ordering (IDO) bit (Attribute[2]) requests to be initiated.
LTR Mechanism Enable
If supported by hardware and set to 'Enabled', this enables the Latency Tolerance
Reporting (LTR) Mechanism.
End - End TLP Prefix Blocking
If supported by hardware and set to 'Enabled', this function will block forwarding of
TLPs containing End-End TLP Prefixes.
Clock Power Management
If supported by hardware and set to 'Enabled', the device is permitted to use
CLKREQ# signal for power management of Link clock in accordance to protocol
defined in appropriate form factor specification.
Compliance SOS
If supported by hardware and set to 'Enabled', this will force LTSSM to send SKP
Ordered Sets between sequences when sending Compliance Pattern or Modified
Compliance Pattern.
Hardware Autonomous Width
If supported by hardware and set to 'Disabled', this will disable the hardware's
ability to change link width except width size reduction for the purpose of correcting
unstable link operation.
Hardware Autonomous Speed
If supported by hardware and set to 'Disabled', this will disable the hardware's
ability to change link speed except speed rate reduction for the purpose of
correcting unstable link operation.