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PEAK 6220 User‘s Guide
BIOS Setup 4-
19
SDRAM RAS-to-CAS Delay
You can select RAS-to-CAS Delay in HCLKs OF 2/2 or 3/3. The system board designer
should set the values in this field, depending on the DRAM installed. Do not change the
values in this field unless you change specifications of the installed DRAM or the
installed CPU.
SDRAM RAS Precharge Time
You can select RAS Precharge Time in HCLKs OF 2/2 or 3/3. The system board designer
should set the values in this field, depending on the DRAM installed. Do not change the
values in this field unless you change specifications of the installed DRAM or the
installed CPU.
SDRAM CAS latency Time
You can select CAS latency time in HCLKs of 2/2 or 3/3. The system board designer
should set the values in this field, depending on the DRAM installed. Do not change the
values in this field unless you change specifications of the installed DRAM or the
installed CPU.
DRAM Data Integrity Mode
Select Parity or ECC (ERROR-CORRECTING CODE), according to the type of installed
DRAM.
System Bios Chcheable
Select Enabled allows caching of the system BIOS ROM at F000h-FFFFFh, resulting in
better system performance. However, if any program writes to this memory area, a
system error may result
Enabled BIOS access cached
Disabled BIOS access not cached
Video BIOS Cacheable
Select Enable allows caching of the video BIOS ROM AT C0000h-F7FFFh, resulting in
better video performance. However, if any program writes to this memory area, a system
error may result
Enabled Video BIOS access cached
Disabled Video BIOS access not cached
Video RAM Cacheable