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VisIC V22N65A GaN Half Bridge Evaluation Board
User Manual USG-022650-004
All the above is subject to T’s & C’s agreed by the parties – VER 3.4
Preliminary Data Sheet: VisIC, Ltd. reserves the right to make design improvement changes at any time.
www.visic-tech.com
User Guide USG-022650-001
Page | 8
The layout of the board is optimized to reduce parasitic stray inductance of high current loops
subjected to high . For the same purpose it is equipped with a set of decoupling capacitors. The set
includes a number of ceramic capacitors located close to switching components and dedicated to
bypass high frequency harmonies of the switched currents. To obtain low frequency filtering the
board is equipped with two bulk (7.5uF) capacitors as well.
(a)
(b)
Fig. 2
Half Bridge Evaluation Board V22N65A general view (a) Component Side; (b) Bottom Side