VIPA SLIO FM 050-1BB00, Руководство пользователя, Страница: 34 / 56

Chapter 3 Deployment
Manual VIPA System SLIO
3-2 HB300E - FM - RE_050-1BB00 - Rev. 10/30
Fast introduction
Limits Valid range of values
Lower counter limit -2 147 483 648 (-2
31
)
Upper counter limit +2 147 483 647 (2
31
-1)
The maximum counter frequency is 400kHz.
At CPU, Profibus and ProfiNET the input respectively output area is
embedded to the corresponding address area.
IX = Index for access via CANopen with
s = Subindex, depends on number and type of counter
SX = Subindex for access via EtherCAT
Input area
Addr. Name Bytes Function IX SX
+0 CV_I 4 Counter 0: Counter value 5400h/s 01h
+4 CV_II 4 Counter 1: Counter value 5400h/s+1 02h
+8 CSTS_I 2 Counter 0: Counter status 5402h/s 03h
+10 CSTS_II 2 Counter 1: Counter status 5402h/s+1 04h
Output area
Addr. Name Bytes Function IX SX
+0 CC_I 4 Counter 0: Comp. value 5600h/s 01h
+4 CC_II 4 Counter 1: Comp. value 5600h/s+1 02h
+8 CCTRL_I 2 Counter 0: Control word 5602h/s 03h
+10 CCTRL_II 2 Counter 1: Control word 5602h/s+1 04h
Bit Name Function
0 - reserved
1 STS_CTRL_COMP is set when
comparison bit
is enabled
2 STS_SW-GATE Status software gate
(set when
SW gate
is active)
3 ... 4 - reserved
5 STS_GATE Status internal gate
(set when internal gate is active)
6 STS_COMP Status
comparison bit
7 STS_C_DN Status set at counter direction backward
8 STS_C_UP Status set at counter direction forward
9 STS_CMP* Status comparison is set when the
comparison condition is met. If comparison
is parameterized
never
, the bit is never set.
10 STS_END* Status is set when
end value
was reached
11 STS_OFLW* Status is set at overflow
12 STS_UFLW* Status is set at underflow
13 STS_ZP* Status is set at zero run
14 ... 15 - reserved
*
The bits remain set until reset with RES_SET (bit 6
control word
).
Counter range
Address areas
CSTS_I
CSTS_II
Counter status