Multi-purpose I/O
33
VL-EPU-4012 Hardware Reference Manual
Pin
Mini PCIe
Signal Name
Mini PCIe Function
mSATA
Signal Name
mSATA Function
37
GND
Ground
GND
Ground
38
USB_D+
USB data +
Reserved
Not connected
39
3.3VAUX
3.3V auxiliary source
+3.3V
3.3 V source
40
GND
Ground
GND
Ground
41
3.3VAUX
3.3 V auxiliary source
+3.3V
3.3 V source
42
LED_WWAN
#
Wireless WAN LED
Reserved
Not connected
43
GND
mSATA Detect (
Note 1
)
GND/NC
Ground/Not connected
(
Note 2
)
44
LED_WLAN# Wireless LAN LED
Reserved
Not connected
45
NC
Not connected
Vendor
Not connected
46
LED_WPAN# Wireless PAN LED
Reserved
Not connected
47
NC
Not connected
Vendor
Not connected
48
1.5V
1.5 V power
+1.5V
1.5 V power
49
Reserved
Reserved
DA/DSS
Device activity (
Note 3
)
50
GND
Ground
GND
Ground
51
Reserved
Reserved
GND
Ground (
Note 4
)
52
3.3VAUX
3.3 V auxiliary source
+3.3V
3.3 V source
Notes:
1.
This pin is not grounded on the Owl since it can be used to detect the presence of an mSATA module versus
a Mini PCIe card.
2.
This pin is not grounded on the Owl to make it available for mSATA module detection.
3.
This signal drives the blue LED activity indicator shown in Figure 18. This LED lights with mSATA disk
activity (if supported by the mSATA module).
4.
Some Mini PCIe cards use this signal as a second Mini PCIe card wireless disable input. On the Owl, this
signal is available for use for mSATA versus Mini PCIe card detection. There is an option on the VersaLogic
Features BIOS Setup utility screen for setting the mSATA detection method.
W_DISABLE# Signal
The W_DISABLE# signal is for use with optional wireless Ethernet Mini PCIe cards. The signal
enables you to disable a wireless card’s radio operation in order to meet public safety regulations
or when otherwise desired. W_DISABLE# is an active low signal that when driven low (shorted
to ground) disables radio operation on the Mini PCIe card wireless device. When W_DISABLE#
is not asserted, or in a high impedance state, the radio may transmit if not disabled by other
means such as software. The W_DISABLE# signals for each of the two Minicards are controlled
by registers in the FPGA.
Содержание Owl
Страница 9: ...Introduction 9 VL EPU 4012 Hardware Reference Manual Introduction Figure 1 The Owl VL EPU 4012 ...
Страница 11: ...Introduction 11 VL EPU 4012 Hardware Reference Manual Block Diagram Figure 2 Owl VL EPU 4012 Block Diagram ...
Страница 69: ...Thermal Considerations 69 VL EPU 4012 Hardware Reference Manual Figure 38 Installing the Passive Heat Sink ...
