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VL-EPU-4562/4462 Reference Manual

KNOWN ISSUES

Operating Systems



In Linux, a dual-display configuration (using both the LVDS and the Mini Disp+

connectors) will fail to show output on the LVDS port unless the operating system is

configured to boot in UEFI mode. Single display configurations do not have an issue.



In Ubuntu 14.04, if an LVDS monitor goes into power saving mode or the operating system

goes into suspend or hibernate mode, the LVDS monitor will fail to come back on.

*** End of document ***

Содержание Blackbird VL-EPU4462

Страница 1: ...ence Manual i Hardware Reference Manual REV August 2018 Blackbird VL EPU 4562 4462 Intel Core based Embedded Processing Unit with SATA Dual Ethernet USB Digital I O Serial Video Mini PCIe Sockets SPX Trusted Platform Module ...

Страница 2: ...to ensure this document is error free VersaLogic makes no representations or warranties with respect to this product and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose VersaLogic reserves the right to revise this product and associated documentation at any time without obligation to notify anyone of such changes Other names and brands may be ...

Страница 3: ... contact VersaLogic Technical Support at 503 747 2261 VersaLogic support engineers are also available via e mail at Support VersaLogic com Repair Service If your product requires service you must obtain a Returned Material Authorization RMA number by calling 503 747 2261 Be ready to provide the following information Your name the name of your company your phone number and e mail address The name o...

Страница 4: ...static foam pad if available The board should also be protected inside a closed metallic antistatic envelope during shipment or storage Note The exterior coating on some metallic antistatic bags is sufficiently conductive to cause excessive battery drain if the bag comes in contact with the bottom side of the Blackbird Handling Care CAUTION Avoid touching the exposed circuitry with your fingers wh...

Страница 5: ...ystem Installation 15 Jumper Blocks 16 Jumper As Shipped Configuration 16 Jumper Configuration Summary 16 Board Features 18 CPU 18 CPU Die Temperature 18 System RAM 19 I O Interfaces 19 Real Time Clock RTC 19 External Connectors 20 Baseboard Connector Locations 20 Power Delivery 22 Main Power Connector 22 Cabling 23 Power Requirements 23 Power Delivery Considerations 23 Power Button 24 Supported P...

Страница 6: ...LVDS Interface 50 LVDS Flat Panel Display Connector 50 LVDS Backlight Connector 52 Network Interfaces 53 Ethernet Connector 53 Cabling 54 Ethernet Status LEDs 55 VL CBR 4005B Paddleboard 56 VL CBR 4005B Connectors and Indicators 56 User I O Connector 57 Cabling 58 On board Battery 58 Auxiliary I O Connector 59 Dimensions and Mounting Holes 60 Digital and Analog I O Paddleboards 61 Analog I O Using...

Страница 7: ...5 Mini PCIe Status LEDs 37 Figure 16 Location and Pin Orientation of the User I O Connector 38 Figure 17 Location and Pin Orientation of the Analog to Digital Input Connector 40 Figure 18 SPX Connector Location and Pin Configuration 42 Figure 19 Location and Pin Orientation of the Serial I O Connectors 44 Figure 20 Location of the Mini DisplayPort Connector 48 Figure 21 VL CBR 2032 Mini DisplayPor...

Страница 8: ...og Input Connector Pinout 41 Table 11 SPX Connector Pinout 43 Table 12 COM1 COM2 Connector Pinout 45 Table 13 COM3 COM4 Connector Pinout 45 Table 14 Mini DisplayPort Connector Pinout 48 Table 15 LVDS Flat Panel Display Connector Pinout 50 Table 16 LVDS Backlight Connector Pinout 52 Table 17 Ethernet Connector Pinout 54 Table 18 Ethernet Status LED Details 55 Table 19 User I O Connector Pinout 57 T...

Страница 9: ...eo outputs LVDS backlight control Up to 32 GB DDR4 memory Dual Gigabit Ethernet ports Dual USB 3 0 port and four USB 2 0 ports support keyboard mouse and other devices Four RS 232 422 485 serial ports audio output and I2 C support Trusted Platform Module Three 8254 timer counters On board data acquisition support Eight multi range analog inputs four analog outputs and twenty four 3 3V digital I O ...

Страница 10: ...Introduction VL EPU 4562 4462 Reference Manual 10 Technical Specifications Refer to the Blackbird Data Sheet for complete specifications Specifications are subject to change without notification ...

Страница 11: ...d GPIOs SDIO User I O PLED On Off PB Reset PB RST_BTN PWR_BTN CBR 4005 Paddleboard AUX Connector Batt I2C BATT CONN Power Input Regulators Power Switches 5V 3 3V 1 5V PCIe SATA PCIe USB FPGA A3P600 FG256 17x17 FBGA SMBus Multifunction 3 3V GPIO x8 Ethernet Link Status LEDs x2 USB0 USB1 USB2 USB3 PCIe Buffer FAN_TACHIN FAN_PWMOUT PCIE_WAKE Not Used USB Audio Audio Conn Wide Range Boost Buck Regulat...

Страница 12: ...sions and Mounting Blackbird Dimensions The figure below provides the board s dimensions COM Express Basic size base Figure 2 Blackbird Dimensions and Mounting Holes Not to scale All dimensions in millimeters 125 00 4 00 121 00 95 00 4 00 91 00 34 00 45 00 ...

Страница 13: ...an operating system OS installation CD ROM Basic Setup The following steps outline the procedure for setting up a typical development system The Blackbird should be handled at an ESD workstation or while wearing a grounded antistatic wrist strap Before you begin unpack the Blackbird and accessories Verify that you received all the items you ordered Inspect the system visually for any damage that m...

Страница 14: ...R 4005B paddleboard to the baseboard s User I O connector Connect a USB keyboard and USB mouse to one of the USB Type A connectors on the VL CBR 4005B paddleboard Attach a USB CD ROM drive to one of the USB Type A connectors on the VL CBR 4005B paddleboard 2 Connect Power Source Plug the power adapter cable VL CBR 0809 into the main power connector on the baseboard Attach the motherboard connector...

Страница 15: ... RAM or battery failure All BIOS defaults can be changed except the time and date BIOS defaults can be updated with the BIOS Update Utility CAUTION If BIOS default settings make the system unbootable and prevent the user from entering the BIOS Setup utility the Blackbird must be serviced by the factory Default BIOS Setup Values After CMOS RAM clears the system loads default BIOS parameters the nex...

Страница 16: ...Termination Jumper In Endpoint termination for RS 485 or RS 422 Jumper Out Not terminated RS 232 default 3 4 COM2 Endpoint termination Jumper In Endpoint termination for RS 485 or RS 422 Jumper Out Not terminated RS 232 default V2 1 2 COM3 Endpoint Termination Jumper In Endpoint termination for RS 485 or RS 422 Jumper Out Not terminated RS 232 default 3 4 COM4 Endpoint termination Jumper In Endpoi...

Страница 17: ... Backup BIOS Select Jumper In Use Backup BIOS on the base board Jumper Out Use Primary BIOS on the COM Express Module default V4 1 2 Backup BIOS Write Protect Jumper In Backup BIOS is write protected default Jumper Out Backup BIOS is not write protected Note Backup BIOS write protection is not currently implemented ...

Страница 18: ...ual Core 16 GB memory support VL EPU 4462 EBP 16 Intel Core i5 6300U 2 4 GHz Dual Core 16 GB memory support VL EPU 4462 EBP 16 Intel Core i7 6600U 2 6 GHz Dual Core 16 GB memory support VL EPU 4562 ECP 16 Intel Core i7 6822EQ 2 0 GHz Quad Core 16 GB memory support VL EPU 4562 ECP 32 Intel Core i7 6822EQ 2 0 GHz Quad Core 32 GB memory support VL EPU 4562 SBP 16 Intel Core i5 6442EQ 1 9 GHz Quad Cor...

Страница 19: ...6 GB 2133 MT s Single Channel VL EPU 4562 SCP 16 DDR4 16 GB 2133 MT s Single Channel VL EPU 4562 SCP 32 DDR4 32 GB 2133 MT s Dual Channel VL EPU 4462 EAP 08 DDR4 8 GB 2133 MT s Single Channel VL EPU 4462 EBP 16 DDR4 16 GB 2133 MT s Single Channel VL EPU 4462 EBP 16 DDR4 16 GB 2133 MT s Single Channel VL EPU 4562 EBP 16 DDR4 16 GB 2133 MT s Single Channel VL EPU 4562 ECP 16 DDR4 16 GB 2133 MT s Sin...

Страница 20: ...Board Features VL EPU 4562 4462 Reference Manual 20 External Connectors Baseboard Connector Locations Figure 5 Top Baseboard Connector Locations ...

Страница 21: ...Board Features VL EPU 4562 4462 Reference Manual 21 Figure 6 Bottom Baseboard Connector Locations ...

Страница 22: ...Power Connector An 8 pin power connector applies the Main input power to the Blackbird The figure below shows the location and the pin orientation of the main power connector Table 3 lists the pinout of the main power connector Figure 7 Main Power Connector Pin Orientation ...

Страница 23: ... to 30 VDC supply capable of providing at least 35 W average power that can also provide a peak power of 60 W The input DC supply creates both the standby and payload voltages provided to the CPU module The exact power requirements for the Blackbird depend on several factors including CPU configuration the number of cores CPU clock rate memory configuration peripheral connections and attached devi...

Страница 24: ...r state Shutdown or Soft Off This connector uses IEC 61000 4 2 rated TVS components to help protect against ESD damage A power button is provided on the VL CBR 4005B paddleboard Refer to the chapter titled VL CBR 4005B Paddleboard beginning on page 56 for more information Supported Power States The next table lists the Blackbird s supported power states Table 4 Supported Power States Power State D...

Страница 25: ...ettings in non volatile RAM The Blackbird has multiple options for providing battery power Use an external battery the VL CBR 0203 for example connected to the board through the battery connector Use the battery supplied with the CBR 4005B paddleboard The figure below shows the location and pin orientation of the battery connector Figure 8 Location and Pin Orientation of the Battery Connector ...

Страница 26: ...5B paddleboard provides a piezoelectric speaker Figure 25 on page 56 shows the location of the piezoelectric speaker on the VL CBR 4005B paddleboard Push button Reset The User I O connector shown in Figure 16 on page 38 includes an input for a push button reset switch Shorting pin 18 to ground causes the Blackbird to reboot This must be a mechanical switch or an open collector or open drain active...

Страница 27: ... location and pin orientation of the CPU fan connector Figure 10 Location and Pin Orientation of the CPU Fan Connector The table below provides the pinout of the CPU fan connector Table 5 CPU Fan Connector Pinout Pin Signal 1 Ground 2 12 VDC Note 3 FAN_TACH 4 FAN_CONTROL Note There is a stuffing option to change Pin 2 to V12_S0 for custom products ...

Страница 28: ...the status indicator LEDs Figure 11 Location of Status Indicator LEDs LED Status Indication Position D7 Wireless WAN LAN activity for module installed in Mini PCIe Socket 3 WWAN is Green WLAN is Yellow D8 SATA mSATA blue activity D9 Power good green and fault indicator yellow dual LED D10 Link activity green for Ethernet port 0 D11 Link activity green for Ethernet port 1 D12 Wireless WAN LAN activ...

Страница 29: ...N activity is green D14 Wireless WAN LAN activity for module installed in Mini PCIe Socket 2 WWAN is Green WLAN is Yellow D15 Status of power and wireless PAN activity for module installed in Mini PCIe Socket 2 Power Status is yellow wireless PAN activity is green D16 Status of power and wireless PAN activity for module installed in Mini PCIe Socket 3 Power Status is yellow wireless PAN activity i...

Страница 30: ...al color green yellow LED D9 provides the following status Green indicates power good when the Blackbird in an S0 state When in sleep modes the LED pulses every 2 seconds Yellow indicates a fault If this LED remains lit after power cycling the Blackbird contact VersaLogic Customer Support ...

Страница 31: ... third port connects to Minicard 1 when an mSATA module is installed The ATX power supplies Power to the SATA drive Note that the standard SATA drive power connector is different from the common 4 pin Molex connector used on IDE drives Most current ATX power supplies provide SATA connectors and many SATA drives provide both types of power connectors If the power supply you are using does not provi...

Страница 32: ...COM Port Port Speed Destination 0 SATA 3 0 On board SATA right angle latching connector J1 VL P N XE1SATASA 1 SATA 3 0 On board SATA right angle latching connector J3 VL P N XE1SATASA 2 SATA 3 0 Electronically mux d to the minicard 1 when selected for mSATA mode otherwise this port is not used ...

Страница 33: ...ose I O VL EPU 4562 4462 Reference Manual 33 Multi purpose I O USB Interfaces As shown below the Blackbird supports four USB 2 0 Host ports and two USB 3 0 Super Speed ports Figure 13 Location of the USB Ports 5 ...

Страница 34: ...l size and supports PCIe Minicard 3 is half size and supports PCIe For information on Mini PCIe modules available from VersaLogic contact Sales VersaLogic com The VL MPEs F1E series of mSATA modules provide flash storage of 4 GB 16 GB or 32 GB To secure a Mini PCIe card or mSATA module to the on board standoffs use two M2 5 x 6 mm pan head Philips nylon screws These screws are available in quantit...

Страница 35: ...nected 14 NC Not connected Reserved Not connected 15 GND Ground GND Ground 16 NC Not connected Reserved Not connected 17 NC Not connected Reserved Not connected 18 GND Ground GND Ground 19 NC Not connected Reserved Not connected 20 W_DISABLE Wireless disable Reserved Not connected 21 GND Ground GND Ground 22 PERST Card reset Reserved Not connected 23 PERn0 PCIe receive B Host receiver diff pair 24...

Страница 36: ... 3 V auxiliary source 3 3V 3 3 V source Notes 1 Some mSATA modules do not leave Pin 43 open 2 Some Mini PCIe cards use this signal as a second Mini PCIe card wireless disable input On the Blackbird this signal is available for use for mSATA versus Mini PCIe card detection There is an option on the VersaLogic Features BIOS Setup utility screen for setting the mSATA detection method W_DISABLE Signal...

Страница 37: ...icard It is intentionally yellow to indicate caution Figure 15 shows their location on the Blackbird Table 8 Mini PCIe Card Status LEDs LED Ref Des State Description Green WWAN D12 1 D14 2 D7 3 On WWAN active Off WWAN inactive Yellow WLAN D12 1 D14 2 D7 3 On WLAN active Off WLAN inactive Green WPAN D13 1 D15 2 D16 3 On WPAN active Off WPAN inactive Yellow Power On D13 1 D15 2 D16 3 On Minicard Pow...

Страница 38: ...ave an alternate mode accessible using the FPGA s AUXMODE1 register Refer to the EPU 4562 4462 Programmer s Reference Manual for more information on FPGA registers Three LEDs two Ethernet link status LEDs and a programmable LED Two I2 C signals clock and data Push button power switch Push button reset switch Speaker output This connector uses IEC 61000 4 2 rated TVS components to help protect agai...

Страница 39: ...t 3 and 4 3 This 3 3 V power goes off in sleep modes The SPKR uses this power as should the PLED there is no requirement for PLED to use this power but the VL CBR 4005B paddleboard does 4 This 3 3 V power can be turned on or off similar to the 3 3V power to the Mini Card via the FPGA can go off in sleep modes or always stay on by default it goes off in sleep modes It is used for the 10 kΩ pullup r...

Страница 40: ...pendently configurable as an input or output DIO inputs can be set for normal or inverted level DIO outputs can be set to be normal HIGH or LOW state There are pull up resistors to 3 3 V on all DIO lines The pull ups implemented in the FPGA can range in value from 20 kΩ to 40 kΩ After reset the DIO lines are set as inputs with pull ups that will be detected as a HIGH state to external equipment Ve...

Страница 41: ...s Refer to the Texas Instruments ADS8668 A D Converter Datasheet for programming information This table provides the pinout of the Analog to Digital and Digital to Analog Input connector Table 10 Analog to Digital and Digital to Analog Input Connector Pinout Pin Signal Pin Signal 1 Analog Input 1 2 Analog Input 2 3 Analog Ground 4 Analog Ground 5 Analog Input 3 6 Analog Input 4 7 Analog Ground 8 A...

Страница 42: ...a CBR 0901 cable The SPX interface provides the standard serial peripheral interface SPI signals CLK MISO and MOSI as well as two chip selects SS0 and SS1 The 5 V power provided to pin 1 of the SPX connector is protected by a 1 A resettable fuse The figure below shows the location and pin orientation of the SPX connector Figure 18 SPX Connector Location and Pin Configuration ...

Страница 43: ...aster device on board The others are Data In and Data Out with respect to the master The SPX implementation on the Blackbird supports chip selects The master device initiates all SPI transactions A slave device responds when its chip select is asserted and it receives clock pulses from the master All four common SPI modes are supported through the use of clock polarity and clock idle state control...

Страница 44: ...can operate in either RS 232 RS 422 or RS 485 mode IRQ interrupts are chosen in the BIOS Setup utility The UARTs are 16550 based serial ports implemented in the FPGA The figure below shows the location and pin orientation of the two serial I O connectors Figure 19 Location and Pin Orientation of the Serial I O Connectors 6 ...

Страница 45: ...D2_N 8 CTS2 RXD2_P 9 RXD2 RXD2_N 10 GND GND Table 13 COM3 COM4 Connector Pinout Pin RS 232 Signal RS 422 RS 485 Signal Port 1 RTS3 TXD3_P COM3 2 TXD3 TXD3_N 3 CTS3 RXD3_P 4 RXD3 RXD3_N 5 GND GND 6 RTS4 TXD4_P COM4 7 TXD4 TXD4_N 8 CTS4 RXD4_P 9 RXD4 RXD4_N 10 GND GND Cabling An adapter cable part number CBR 1014 is available for routing the serial I O signals to 9 pin D sub connectors This is a 12 ...

Страница 46: ...on page 16 for details The termination resistor should only be enabled for RS 485 or RS 422 endpoint stations and not for intermediate stations Termination must not be used for RS 232 Console Redirection The Blackbird can be configured for remote access by redirecting the console to a serial communications port The BIOS Setup utility and some operating systems such as MS DOS can use this console f...

Страница 47: ...ink transfers high speed isochronous video and audio data Auxiliary channel used for link management and device control the EDID is read over this interface Hot Plug Detect indicates that a cable is plugged in The DisplayPort interface supports Audio signaling DP mode allowing connection to an HDMI device through a passive adapter Passive means that the adapter does not do any protocol conversion ...

Страница 48: ... Note Power is off in sleep modes and the maximum current is 500mA and has a 1A resettable fuse Pin Signal Pin Signal 1 GND 2 HOT PLUG DETECT 3 ML_LANE0_P 4 CONFIG 1 5 ML_LANE0_N 6 CONFIG 2 7 GND 8 GND 9 ML_LANE1_P 10 ML_LANE3_P 11 ML_LANE1_N 12 ML_LANE3_N 13 GND 14 GND 15 ML_LANE2_P 16 AUX_CH_P 17 ML_LANE2_N 18 AUX_CH_N 19 GND 20 DP_POWER 3 3V Note ...

Страница 49: ...62 Reference Manual 49 VGA Output A VGA monitor can be attached to either Mini DisplayPort connector using the VL CBR 2032 Mini DisplayPort to VGA adapter similar to the one below Figure 21 VL CBR 2032 Mini DisplayPort to VGA Adapter ...

Страница 50: ...at panel types If these options do not match the requirements of the panel you are using contact Support VersaLogic com for a custom video BIOS Figure 22 Location of the LVDS Connectors Table 15 LVDS Flat Panel Display Connector Pinout Pin Signal Name Function 1 GD1 Guard tie to Earth Ground 2 LVDS_ODD0_N LVDS Odd Lane 0 Neg Diff Signal 3 LVDS_ODD0_P LVDS Odd Lane 0 Pos Diff Signal 4 LVDS_ODD1_N L...

Страница 51: ... Power 3 3V 31 VCC4 Panel Power 3 3V 32 GD2 Guard tie to Earth Ground 33 MP1 Mounting pad on Pin1 end connected to Guard pins tie to Earth Ground 34 MP2 Mounting pad on Pin 32 end connected to Guard pins tie to Earth Ground Note Panel power goes off in sleep modes The 3 3V power provided to pins 19 and 20 is protected by a software controllable power switch 1 Amp max The LVDD_EN signal controls th...

Страница 52: ...RL LVDS backlight control output 5V TTL level signal by default but will operate at higher voltages if the LVDS_BKLT_PWR is provided This is a PWM signal and the duty cycle can be set in the BIOS Setup utility 4 LVDS_BKLT_LOGIC_PWR Optional backlight logic power input Can range from 5V to 14V and sets the high value on the LVDS_BKLT_EN and LVDS_BKLT_CTRL signals On board 5V power is used when this...

Страница 53: ...rt a variety of operating systems For more information on these devices refer to Intel I210 Ethernet Controller datasheet or Intel I219 Ethernet Controller datasheet Integrator s Note Ethernet Port 1 supports network boot Port 0 does not Ethernet Connector The Ethernet connector provides access to the Ethernet ports 0 and 1 Ethernet Port 0 connects to the I210 IT Ethernet controller on the baseboa...

Страница 54: ...Rx BI_DC 7 Auto Switch Tx or Rx BI_DA 8 Auto Switch Tx or Rx BI_DA Port 1 9 Auto Switch Tx or Rx BI_DD 10 Auto Switch Tx or Rx BI_DD Port 1 11 Auto Switch Tx or Rx BI_DB 12 Auto Switch Tx or Rx BI_DB 13 Auto Switch Tx or Rx BI_DC 14 Auto Switch Tx or Rx BI_DC 15 Auto Switch Tx or Rx BI_DA 16 Auto Switch Tx or Rx BI_DA Cabling An adapter cable part number CBR 1604 is available This is a 12 inch 16 ...

Страница 55: ... figure below shows the location of the Ethernet status LED Table 18 Ethernet Status LED Details LED Ref Des State Description Green Activity D10 Eth 0 D11 Eth 1 On Link Good pulses with activity Off Link is not good or cable is not connected Figure 24 Onboard Ethernet Status LEDs ...

Страница 56: ...62 Reference Manual 56 VL CBR 4005B Paddleboard VL CBR 4005B Connectors and Indicators This figure shows the locations of the connectors switches and LEDs on the VL CBR 4005B paddleboard Figure 25 VL CBR 4005B Connectors Switches and LEDs 9 ...

Страница 57: ...B3_N 12 USB4_N 13 3 3 V Note 1 14 GND 15 SPKR 16 PLED 17 PWR_BTN 18 RST_BTN 19 GND 20 GND 21 I2C Clock 22 V_BATT 23 I2C Data 24 V_BATT RETURN 25 GND 26 GND 27 GPIO1 28 GPIO2 29 GPIO3 30 GPIO4 31 GND 32 GND 33 GPIO5 34 GPIO6 35 GPIO7 36 GPIO8 37 3 3 V Note 2 38 GND 39 ETH0 LED 40 ETH1 LED Notes 1 This 3 3 V power goes off in sleep modes The SPKR uses this power as should the PLED there is no requir...

Страница 58: ...cation requires a custom cable the following information will be useful CBR 4005B Board Connector Mating Connector Molex 501571 4007 Molex 501189 4010 On board Battery CAUTION To prevent shorting premature failure or damage to the Lithium battery do not place the board on a conductive surface such as metal black conductive foam or the outside surface of a metalized ESD protective pouch The Lithium...

Страница 59: ...on and Pin Orientation of Auxiliary I O Connector Table 20 Auxiliary I O Connector Pinout Note Pin 17 connects to the 3 3V power on the main connector Pin 37 Pin Signal Pin Signal 1 I2C Clock 2 V_BATT 3 I2C Data 4 V_BATT_RETURN 5 GND 6 GND 7 GPIO1 8 GPIO2 9 GPIO3 10 GPIO4 11 GND 12 GND 13 GPIO5 14 GPIO6 15 GPIO7 16 GPIO8 17 3 3 V Note 18 GND 19 Ethernet Port 0 LED 20 Ethernet Port 1 LED ...

Страница 60: ...VL CBR 4005B Paddleboard VL EPU 4562 4462 Reference Manual 60 Dimensions and Mounting Holes Figure 28 VL CBR 4005B Dimensions and Mounting Holes ...

Страница 61: ...e connectors on the CBR 2004B paddleboard Table 21 CBR 2004B Pinouts Pin Signal Description 1 ADC_CH1 Analog Input 1 2 ADC_CH2 Analog Input 2 3 AGND Analog Ground 4 AGND Analog Ground 5 ADC_CH3 Analog Input 3 6 ADC_CH4 Analog Input 4 7 AGND Analog Ground 8 AGND Analog Ground 9 ADC_CH5 Analog Input 5 10 ADC_CH6 Analog Input 6 11 AGND Analog Ground 12 AGND Analog Ground 13 ADC_CH7 Analog Input 7 14 ...

Страница 62: ...O 5 DGND Digital Signal Ground 6 DIO5 Digital I O 7 DIO6 Digital I O 8 DIO7 Digital I O 9 DIO8 Digital I O 10 DGND Digital Signal Ground 11 DIO9 OCTC5 Digital I O optional Timer Chan 5 Output 12 DIO10 ICTC5 Digital I O optional Timer Chan 5 Output 13 DIO11 GCTC3 Digital I O optional Timer Chan 3 Gate Input 14 DIO12 GCTC4 Digital I O optional Timer Chan 4 Gate Input 15 DGND Digital Signal Ground 16...

Страница 63: ...ital and Analog I O Paddleboards VL EPU 4562 4462 Reference Manual 63 Figure 30 Digital I O and Ground Terminal Block Pinouts Dimensions and Mounting Holes Figure 31 CBR 2004B Dimensions and Mounting Holes ...

Страница 64: ... solution using the accessories available from VersaLogic or develop their own thermal solution that attaches to the heat plate suitable for environments in which the EPU 4562 4462 will be used As stated above the thermal solution must be capable of keeping the top surface of the heat place at or below 90 ºC and the air surrounding the components in the assembly at or below 85 ºC The heat plate is...

Страница 65: ...62 4462 board to allow for convective airflow Lower the system level temperature requirement as needed CPU Thermal Trip Points The CPU cores in the Blackbird have their own thermal sensors Coupled with these sensors are specific reactions to three thermal trip points The table below describes the three thermal trip points Note that these are internal temperatures that are about 10 ºC above the hea...

Страница 66: ...table lists some of these hardware monitoring programs Table 23 Temperature Monitoring Programs Operating System Program Type Description Windows Core Temperature http www alcpu com CoreTemp Hardware Monitor http www cpuid com softwares hwmonitor html Open Hardware Monitor http openhardwaremonitor org Linux lm sensors http en wikipedia org wiki Lm_sensors ...

Страница 67: ...4462 needs to be maintained at 85 ºC or below This includes the space between the two main boards as well as the space beneath an installed Mini PCIe expansion board A recommended overall airflow of 100 linear feet per minute LFM 0 5 linear meters per second LMS addresses this requirement If this air flow is not provided other means must be implemented to keep the adjacent air at 85 ºC or below He...

Страница 68: ... ports in loopback configuration Two USB 2 0 ports in loopback configuration Note USB keyboard and mouse Note BIOS ID string VER2A000 Passive thermal trip point setting 105 ºC Critical thermal trip point setting 111 ºC Operating system Microsoft Windows 10 Enterprise Test software Passmark BurnIn Test v8 1 b1018 CPU utilization 90 Intel Thermal Analysis Tool TAT v5 0 1026 Primarily used to read th...

Страница 69: ...just the heat sink the core temperature is slightly above 100 ºC at maximum ambient temperature This will be less in most applications that require less than 90 CPU utilization Adding the fan provides an additional 5 6 ºC of margin For long term reliability ensure the CPU cores are predominately running with their temperatures below 100 ºC Figure 32 EPU 4562 EBP Quad Core Temperature Relative to A...

Страница 70: ...re i7 EPU 4562 ECP Passive and Active Thermal Characterization As shown below the quad core version of the Blackbird will typically require a heat sink fan for operation above 80 ºC at 90 CPU utilization Figure 33 EPU 4562 ECP Quad Core Temperature Relative to Ambient Temperature ...

Страница 71: ...late down in relation to the enclosure Heat plate up These assembly methods are shown in Figure 35 and Figure 36 respectively Heat Plate Down The figure below a representative image of a similar VersaLogic product shows the assembly Use this assembly method if you are attaching the Blackbird to a larger thermal solution such as a metal chassis enclosure Figure 34 Hardware Assembly with Heat Plate ...

Страница 72: ...ticsilver com 2 Position the passive heat sink Using the next figure as a guide align the seven mounting holes of the heat sink with the heat plate Orient the heat sink fins in the direction of the system airflow to maximize CPU cooling 3 Secure the passive heat sink to the heat plate Affix the passive heat sink to the heat plate using seven M2 5 pan head screws Using a torque screwdriver tighten ...

Страница 73: ...an with the four holes in the passive heat sink Position the fan so that its power cable can easily reach its mating connector J18 2 Secure the fan to the heat sink Affix the heat sink fan using four M3 pan head screws Using a torque screwdriver tighten the screws to 4 0 inch pounds 3 Connect power to the fan Connect the fan s power cable to J18 on the EPU 4562 4462 Figure 36 Installing the Heat S...

Страница 74: ... connectors will fail to show output on the LVDS port unless the operating system is configured to boot in UEFI mode Single display configurations do not have an issue In Ubuntu 14 04 if an LVDS monitor goes into power saving mode or the operating system goes into suspend or hibernate mode the LVDS monitor will fail to come back on End of document 13 ...

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