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The ENDAT-3203M/3220M System Board
3-4. Details of the Advanced Chipset Setup
Advanced Chipset Setup
******** DRAM Timing ********
Configure SDRAM Timing by SPD
Enabled
DRAM Frequency
133MHz
SDRAM CAS# Latency
3
DRAM Bank Interleave
Disabled
DRAM Page Mode
Disabled
Memory Hole
Disabled
AGP Read Synchronization
Enabled
AGP Fast Write
Enabled
AGP Aperture Size
128MB
AGP Master 1 W/S Write
Disabled
AGP Master 1 W/S Read
Disabled
PCI Delay Transaction
Enabled
USB Controller
ALL USB Port
USB Device Legacy Support
All Device
Port 64/60 Emulation
Disabled
Boot ROM Support
Disabled
Configure SDRAM Timing by SPD
SPD (Serial Presences Detect) is a device in memory module for storing the module
information such as DRAM timing and chip parameters. If this option is enabled,
BIOS will access SPD automatically to configure module timing. If disabled,
DRAM timing can be configured manually.
SDRAM Frequency
Allow you to set the SDRAM frequency with user set by SPD Disable.
<Choices: 66MHz / 100MHz / 133MHz>
Caution:
Improper setting will cause unpredicted result
SDRAM CAS# Latency
With SDRAM Timing by SPD disabled, you can
select the SDRAM CAS# (Column Address Strode) latency manually.
<Choices: 2 Clocks; 3 Clocks>
Содержание ENDAT-3203M
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