TYAN Transport TN27 B4987, Руководство по обслуживанию

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Feature Option Description
Memory Configuration
Limit
Auto Memclock Mode
Manual
Select the DRAM Frequency
programming method. If Auto, the
DRAM speed will be based on
SPDs. If Limit, the DRAM speed will
not exceed the specified value. If
Manual, the DRAM speed specified
will be programmed by users.
400
533
667
Memory Clock Value
800
Set Memory Value
Manual
MCT Timing Mode
Auto
Allow user to configure the MCT
Timing Mode manually.
Auto
CAS Latency (CL)
3.0 ~ 6.0
Set CAS Latency
Auto
TRAS
5CLK ~ 18CLK
Set TRAS
Auto
TRP
3CLK ~ 6CLK
Set TRP
Auto
TRCD
3CLK ~ 6CLK
Set TRCD
Auto
TRRD
2T ~ 5T
Set TRRD
Auto
TRC
11T ~ 25T
Set TRC
Disabled
Bank Interleaving
Auto
Enable Bank Memory Interleaving
Enabled
Enable Clock to All DIMMs
Disabled
Enable unused clocks to DIMMs
even memory slots are not
populated.
Enabled MemClk Tristate
C3/ATLVID
Disabled
Enable/Disable MemClk Tri-Stating
during C3 and Alt VID
Enabled
CS Spuring Enable
Disabled
Reserve a spare memory rank in
each mode.
Enabled
DQS Signal Training
Control
Disabled
Turning this off will require custom
memory timings programming.
Training will be automatically
disabled if CS sparing is enabled.
Enabled
Memory Hole Remapping
Disabled
Enable Memory Remapping around
Memory Hole
Chapter 4: BIOS Setup 104