PCM30U, PCM30U-OCH – User's, Operating and Maintenance Manual
circuit of the
LP1
low-pass filter limits the transmitted frequency band to 2.8 kHz to make it possible to
reliably transmit fast transition phenomena at high short-circuit currents on extra high voltage lines.
The analogue signal of both the channels being transmitted is then conducted to a 4-level digital 10-bit
A/D
converter. In addition to the converter’s two analogue inputs for the 1
st
and 2
nd
50Hz channels being
transmitted, a third input is also used, serving for the measurement of voltage at the source battery -Ubat
(supervised by the DORIS system). Ther fourth analogue input of the A/D converter is not used. Within one
PCM framework – 125 µs – two different samples are taken from each channel within intrvals of 62.5 µs. The
50 Hz analogue signal’s sampling frequency is 16 kHz, i.e. twice the telephone channel’s sampling
frequency. This provides a higher accuracy of transmission at short circuit in the protected line, where the
50 Hz signal abruptly changes shape and amplitude. The -Ubat DC signal is sampled at a 125µs frequency.
However, 8 bits are transmitted and therefore, in the unit’s comparison protection mode, the 10bit signal is
first digitally compressed to 8 bits. As a result, even the low voltage levels of the 50Hz input voltage are
transmitted with a maximum accuracy. In the unit’s synchronisation mode, only the upper 8 bits are used and
are not compressed (the lower two bits for the low voltage levels are left out) because a signal that is
constant in terms of amplitude whose magnitude is close to the maximum input level (and compression
would degrade it) is used almost exclusively. The -Ubat direct current signal is sampled at 8 bits without
compression and is displayed in the management system.
The unit communicates with the opposite unit through a slow data channel in TS16. The basic information on
the state of the unit is transmitted in this channel. Also transmitted in this channel, for security’s sake, is
identification to prevent false action in an unwanted loop on the route and a wrong TS interconnection.
In RO4’s transmitting direction, there are also circuits of the feedback control signal
ZK
for analogue
comparison of the voltage and phase of the signal transmitted with the control signal, which was transmitted
back from the signal delivery place in the “Synchronisation Signal Transmission” function. An analogue
comparison circuit is used, assessing the voltage and phase difference of the two signals with sensitivity
optimised at about ± 8 Vrms from the 100 Vrms of the output voltage and at about ± 0.45 ms, i.e. an about ±
8° difference in phase. The output signal of the comparison circuit is time-filtered through a circuit with a time
constant of about 200 ms.
E.2.1.2 RO4’s receiving direction
The input of the RO4 is the receiving bus, “BUS RECEIVING” 2 Mbit/s. The circuit of the gate array
PLD-
XILINX
identifies and reads the content of the respective channel intervals along which the digitally encoded
signal is transitted from the opposite station of PCM30U-OCH. If necessary, the 2x8 bit sequence of both the
transmitted channels and of the -Ubat battery voltage signal (if compressed) is decompressed in the XILINX
circuit to 2x10 bits for the dual 10bit
D/A
converter. If the signal is not compressed, the 2x8 bits received are
directly used.
Each channel’s signal can be delayed by digital setting of the delay in the receiving direction, using the
switch on the unit’s panel
+ms1 (+ms2)
by steps
Δ
t = 0.5 ms within the range of 0 ms – 7.5 ms. In addition, it
is possible, using jumpers at the XJ1, to set an additional digital delay of +8 ms or +16 ms. It is also possible
to finely tune the delay or phase lead (the function is adjustable with XJ105, XJ205 jumpers) of the
transmitted 50 Hz signal using the analogue correction phase link continuously adjustable by means of the
resistor trimmer
±
ϕ
1
(
±
ϕ
1
) on the panel of each channel within the range of ±0 ms to ±0.5 ms. The analogue
delay or phase lead is in fact a phase shift performed by the analogue phase corrector, which causes no
change to the actual time delay in signal transmission (see
!!! Note
).
The digital signal of both analogue channels can be checked (in an adjustable manner, using DORIS) for
decrease of the respective 50Hz analogue voltage under a certain selected limit.
The analogue signal from the
D/A
converter is filtered through the
LP2
low pass, like in the transmitting
direction. The related circuit of the
A2
amplifier with a potentioneter to regulate amplification is used for
setting the output U2 voltage to the maximum value of up to 50 Vrms or up to 100 Vrms (the range of up to
50 Vrms or 100 Vrms is adjustable, using jumpers at XJ103, XJ203) at the output from the
TR2
output
transformer at a maximum excitation. The
A3
amplifier is a power amplifier working in the AB class. It is
protected against short circuit at the output of the
TR2
output transformer. The supply voltage of the A3
amplifier is DC -48 V ± 10% (external supply voltage).
The
TR2
transformer, dimensioned to 10 VA, is used at 5 VA at the maximum, with respect to the reliability
of the equipment. It provides symmetric output and galvanic separation with an isolation voltage of 4 kV. The
output of the receiver of the RO4 unit is protected against interfering voltage in the same manner as input in
the transmitting direction.
Power Channel Modules
E-30
446S037.914.14N00