Preliminary User's Manual l MBLS1012AL UM 0001 l © 2019, TQ-Systems GmbH
Page 25
4.5.3
GPIO port expander
Due to the low number of native GPIOs provided by the LS1012AL CPU, two GPIO expanders with 16 and 8 IOs are available
on the MBLS1012AL. The respective interrupt pin of the GPIO expander is connected to a GPIO pin of the LS1012AL CPU:
•
16 pin expander
NXP, PCA9555PW
: GPIO1_24
•
8 pin Expander
NXP, PCA9538ABS
: GPIO1_27
The port expanders are configured via I
2
C. The address of the port expanders can be changed by resistor assembly. When
changing the address, care must be taken to avoid address conflicts with existing I
2
C devices. The assembly options are
documented in the circuit diagram.
In the initial state, after power-up, all ports are set as input and the connected component is thus deactivated.
For the properties of the externally available GPIOs see section 4.5.2.
The following table shows the functions of the pins of the port expander.
Table 31:
Function of Port Expanders
Port
Signal
Typ.
Default
Remark
16-Pin Expander, NXP, PCA9555PW
IO0_0
WLAN_DISABLE#
O
High
Pin 20 at X3 (WLAN)
IO0_1
VCC_PCIE_EN_3V3
O
Low
Enable-Signal for 3.3 V voltage PCIe
IO0_2
GPIO_3V3_3
I/O
–
GPIO on header (pin 28, X22)
IO0_3
VCC_WLAN_EN_3V3
O
Low
Enable-Signal for 3.3 V voltage WLAN
IO0_4
IOXP_PCIE_RST#
O
Low
Selective Reset PCIe
IO0_5
IOXP_WLAN_RST#
O
Low
Selective Reset WLAN
IO0_6
IOXP_USB_RST#
O
Low
Selective Reset USB
IO0_7
IOXP_ETH_SW_RST#
O
Low
Selective Reset Ethernet Switch
IO1_0
IOXP_ETH_LNK_RST#
O
Low
Selective Reset Ethernet Link
IO1_1
GPIO_3V3_1
I/O
–
GPIO on header (Pin 24, X22)
IO1_2
GPIO_3V3_2
I/O
–
GPIO on header (Pin 26, X22)
IO1_3
PCIE_DIS#
O
High
Pin 20 at X4 (Mini PCIe)
IO1_4
PCIE_WAKE#
I
High
Pin 1 at X4 (Mini PCIe)
IO1_5
–
I
High
Input for push button S2 on front panel
IO1_6
–
O
High
LED V15 green with light guide at front panel
IO1_7
–
O
High
LED V16 green
8-Pin Expander, NXP, PCA9538ABS
IO_0
PCIE_CLK_PD#
O
High
Disable for PCIe Clock
IO_1
PMIC_INT#
I
High
Input for PMIC Interrupt. Also on X22
IO_2
ETH_SW_INT#
I
High
Input for Ethernet Switch Interrupt
IO_3
ETH_LINK_PWRDWN#
O
Low
Power-Down output for Ethernet Link
IO_4
–
I
High
Input for push button X15
IO_5
–
I
High
Input for push button X16
IO_6
VCC_WLAN_EN_1V5
O
Low
Enable-Signal for 1.5 V voltage WLAN
IO_7
VCC_PCIE_EN_1V5
O
Low
Enable-Signal for 1.5 V voltage PCIe
Illustration 25:
Position of Port-Expander
