Preliminary User's Manual l MBLS1012AL UM 0001 l © 2019, TQ-Systems GmbH
Page 15
4.2.8
Mini PCIe
PCIe X1
USB
Sim
Card
I2C
LED
TQMLS1012AL
Mini PCIe
connector
(X4)
Hub
USB
Clock
Generator
PCIE_DIS#
PCIE_WAKE#
PCIE_RST#
Illustration 13:
Block diagram Mini PCIe
The processor provides a PCIe Gen2 interface with one lane (x1) via the SerDes interface. In standard muxing, this Lane occupies
Lane B of the SerDes interface. It is compatible to the PCI Express Base Specification, Revision 3.0 and supports transfer rates of
2.5 GT/s as well as 5 GT/s.
In addition to the PCIe-Lane, a USB host (from the USB hub) and an I
2
C interface are connected to the Mini PCIe interface. The
power supply is implemented with 3.3 V and 1.5 V and must be activated separately on the port expander via VCC_PCIE_EN_1V5
and VCC_PCIE_EN_3V3.
When using the I
2
C functionality, check in advance whether the I
2
C address used by the plug-in card is not yet being used by a
peripheral on the MBLS1012AL. See also Table 13.
The reference clock is provided by a special PCIe clock generator 9FGV0241. The clock generator can optionally be connected to
the I
2
C bus with 0 Ω resistors. Individual outputs can be switched off and the slew rate and amplitude can be changed via the I
2
C
bus. The I
2
C address can be taken from Table 13.
The control lines PCIE_WAKE# and PCIE_DIS# can be switched via the port expander.
There is only one LED, which can be connected to one of the pins 42, 44 or 46 via the pre-resistor. By default LED_WWAN# is
assembled.
The layout has been designed to allow both full-size and half-size Mini PCI Express cards to be used. The full-size form factor is
available as standard.
The interface is wired with all signals provided by the standard (e.g. USB, I
2
C, and PCIe).
Any standard compliant Mini PCIe card can be used
.
A micro SIM card holder is also provided for the use of a GSM card. SIM cards that require 5 V supply/signal level are not
supported.
The voltages provided for the Mini PCIe card must not exceed the currents specified in Table 17.
3:
Where required drivers are available.