10-7
October 2000 © TOSHIBA TEC
MR-3011/3012 DESCRIPTION OF CIRCUITS
10.8 Drive Circuit for Reverse Solenoid
This circuit controls the closing/opening of the flapper of the reverse solenoid.
When the level of RKNSOL_PWM is "H", Q13 is turned ON and the flapper is closed. The drive signal for the
solenoid is a PWM signal. The flapper is closed in the maximum torque of the solenoid and the duty value
becomes 100% when the flapper is started to be closed. The duty value is then decreased down to 50% and the
flapper is kept closed while the temperature rising of the solenoid is lowered.
10.9 Reset Circuit
This circuit generates a CPU reset signal when the power is turned ON and the power voltage is cut off or
lowered instantaneously. This circuit has a watchdog timer for diagnosis of the CPU system operation.
The level of IC13-8pin (*RES) is normally "H" after the power is turned ON. However, when the power is turned
OFF or the voltage of the +5V power supply is decreased to 4.2V or lower for some reason, the level of IC3-8pin
becomes "L" and the CPU is reset. A clock with a fixed cycle is input to IC13-3pin (CK) from the CPU to clear the
watchdog timer of IC13. If the clock is not input from CPU due to a system error, the level of IC13-8pin becomes
"L" to reset CPU and system operation is stopped.
DF+24V
1
1
2
R115
PGND
2
R116
SGND
TP49
RKNSOL_PWM
1
D
G
3
S
2
1
DF+24V CN5.4
*RSOL
CN5.5
Q13
5
4
1
2
A
K
D12
RSOL
Reverse solenoid
+5V
SGND
A
K
*RESET
WDT_CK
2
1
R125
1
2
C114
1
2
D3
2
1
C116
3
CK
*RES
8
CT
1
VREF
6
+
C113
2
1
7
2
RES
+
C115
2
1
VCC
5
GND
4
C57
2
1
SGND
VS
IC13
#Chapter_10.p65
10/5/00, 9:57 AM
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