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This unit outputs 10 bit digital video signals each for R, G and B from the DIGITAL terminal using the LVDS
(Low Voltage Differential Signaling) method.
(
((
(
1
)
))
)
Sync pulse timing
(CBL
internal pulse
)
(ODD:H,EVEN:L)
35ns
LINE EN
FRAME EN
FIELD ID
VD output
PIXEL CLK
LINE EN
t
1
t0
t2
t3
FRAME EN
FIELD ID
R0
~
R9
G0
~
G9
B0
~
B9
t
1
t0
Item Symbol
Value
unit
clock frequency
28.3750 (typical)
MHz
enable setup time
t0
10 (minimam)
ns
enable hold time
t1
5 (minimam)
ns
data setup time
t2
10 (minimam)
ns
data hold time
t3
5 (minimam)
ns
The sync pulse is output according to the camera through picture output.
Example
:
For SS long period exposure, field storage, 2FRM setting
ODD
n
ODD
n
ODD
n
+
1
FRAME EN
LINE EN
(
INDEX
)
Video output
VD output
Index output
:
Camera through image
:
Memory image
EVEN
n
-
1
EVEN
n
EVEN
n
EVEN
n
+
1
7
.
.
.
.
7 Digital output