January 2001 © TOSHIBA TEC
5 - 11
GD-1060 CIRCUIT DESCRIPTION
5.4.1 Line path switching control circuit
NAD/SAD/TWD models
Fig. 5-4-3
The line path switching control circuit consists of the CML relay (RLY2) and analog switch (IC51) on the
NCU PWA, the I/O port GA-2 (IC6) on the Main PWA, and other peripheral devices.
The CML relay is switched according to the CML1 signal output from the I/O port GA-2 on the Main PWA.
When the CML1 signal goes HIGH, Q51 turns on to turn on the CML relay.
The analog switch is switched according to the CML1 signal and ATT3DB1 signal. When the CML1 signal
or ATT3DB1 signal goes HIGH, the analog switch turns on.
Turning on the CML relay and analog switch allows the MODEM to be connected to the line.
CML1
ATT3DB1
3
1
2
6
AG
Q51
CN10
Lb
La
Line
0
1
0
1
+12V
RLY2
CML relay
T1
IC53
R59
R66
IC52
IC53
R71
4
3
CN11
a2
b2
External
telephone
3
4
3
1
2
13
14
15
4
10
9,11
6
3
2
1
76
73
Main PWA
NCU PWA
IC6
I/O port GA-2
AG
Ring signal
detection
circuit
0
1
0
1
0
1
IC51
Analog
switch
C5
R4
CN9
CN3
TX1
RX1
89
90
89
90
32
28,29
IC4
MODEM
FAX PWA
CN101
CN6
05-04-02-U
Signal Name
I/O
Active
Description
Destination
CML1
O
H
CML Relay Control Signal
RLY2, IC51
ATT3DB1
O
H
Attenuator Control Signal
IC51