Mar. 1999 © TOSHIBA TEC
16 - 43
6570/5570 ADF
16.10.6
Reset circuit
This circuit generates the CPU reset signal when the power is turned ON, and when the power voltage is
momentarily interrupted or low. It has a watchdog timer for diagnosing CPU system operation.
After the power is turned ON, pin 8 (*RES) of IC3 is normally High. However, when the power is turned
OFF, or an error causes the +5V voltage to fall below 4.2V, pin 8 of IC3 turns Low to reset the CPU and
stop system operation.
During normal operation, a fixed cycle clock is input to pin 3 (CK) of IC3 and IC3’s built-in watchdog timer
is cleared. If a system error prevents the clock from being input from the CPU, pin 8 of IC3 turns Low, to
reset the CPU and stop system operation.
Resistor R27 is for stopping the watchdog timer, and is normally not mounted.
+5V
R103
SGND
SGND
VS
RES
5
1
2
2
7
1
2
3
8
1
6
1
1
C4
C70
CK
*RES
D1
R27
2
1
2
1
2
1
2
24
VCC
IC1
GND
CK
CT
*RES
VREF
C20
C71
+
C5
A
K
+
1
2
Содержание 4580
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