Toradex Verdin Development Board, Руководство пользователя

Страница: 12 / 19

Verdin Development Board Errata
Toradex AG lEbenaustrasse 10 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l support@toradex.com
Page 12 | 19
`
Errata #7:
HAR-8016 – CSI_1_MCLK Voltage Level is not 3.3V
Affected Version: Verdin Development Board V1.0B
Verdin Development Board V1.1A
Fixed in:
TBD
7.1 Customer impact
If a MIPI CSI-2 camera requires the CSI_1_MCLK signal (pin #12 of X47), and if it requires this
signal to be at 3.3V level, then the current voltage level of the signal won't be compatible with the
camera.
7.2 Description
On the MIPI CSI-2 interface used on the Verdin Development Board V1.1A, all single-ended
signals are at 3.3V level, except for the CSI_1_MCLK signal (pin #12 of X47), which is at 1.8V
level.
7.3 Workaround
In case a MIPI CSI-2 camera requires the CSI_1_MCLK signal (pin #12 of X47), and in case it
requires this signal to be at 3.3V level, it could be level shifted on custom carrier boards.