Preliminary
THCV245A_Rev.0.90_E
Copyright©2020 THine Electronics, Inc.
THine Electronics, Inc.
Security C
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Table 33.
2-wire serial I/F Set& Trigger mode remote access control and monitoring local registers
M
aster
Master
Slave
or
S
lav e
Addr(h) Addr(h)
Bits
Register
w idth
R/W
Description
Default
related
0x0030
-
[7:0]
R_2WIRE_DATA0
8
RW
2-w ire serial I/F remote w rite/read data #0
8'd0
M
0x0031
-
[7:0]
R_2WIRE_DATA1
8
RW
2-w ire serial I/F remote w rite/read data #1
8'd0
M
0x0032
-
[7:0]
R_2WIRE_DATA2
8
RW
2-w ire serial I/F remote w rite/read data #2
8'd0
M
0x0033
-
[7:0]
R_2WIRE_DATA3
8
RW
2-w ire serial I/F remote w rite/read data #3
8'd0
M
0x0034
-
[7:0]
R_2WIRE_DATA4
8
RW
2-w ire serial I/F remote w rite/read data #4
8'd0
M
0x0035
-
[7:0]
R_2WIRE_DATA5
8
RW
2-w ire serial I/F remote w rite/read data #5
8'd0
M
0x0036
-
[7:0]
R_2WIRE_DATA6
8
RW
2-w ire serial I/F remote w rite/read data #6
8'd0
M
0x0037
-
[7:0]
R_2WIRE_DATA7
8
RW
2-w ire serial I/F remote w rite/read data #7
8'd0
M
0x0038
-
[7:0]
R_2WIRE_DATA8
8
RW
2-w ire serial I/F remote w rite/read data #8
8'd0
M
0x0039
-
[7:0]
R_2WIRE_DATA9
8
RW
2-w ire serial I/F remote w rite/read data #9
8'd0
M
0x003A
-
[7:0]
R_2WIRE_DATA10
8
RW
2-w ire serial I/F remote w rite/read data #10
8'd0
M
0x003B
-
[7:0]
R_2WIRE_DATA11
8
RW
2-w ire serial I/F remote w rite/read data #11
8'd0
M
0x003C
-
[7:0]
R_2WIRE_DATA12
8
RW
2-w ire serial I/F remote w rite/read data #12
8'd0
M
0x003D
-
[7:0]
R_2WIRE_DATA13
8
RW
2-w ire serial I/F remote w rite/read data #13
8'd0
M
0x003E
-
[7:0]
R_2WIRE_DATA14
8
RW
2-w ire serial I/F remote w rite/read data #14
8'd0
M
0x003F
-
[7:0]
R_2WIRE_DATA15
8
RW
2-w ire serial I/F remote w rite/read data #15
8'd0
M
0x0040
-
[7:1]
R_2WIRE_DEVADR
7
RW
2-w ire serial I/F remote access target device address.
if target=self addr.; access to Sub-Link Slave inside register,
else; access to remote side 2-w ire serial Slave devices externally
connected to Sub-Link slave
7'h00
M
0x0040
-
[0]
R_2WIRE_WR
1
RW
2-w ire serial I/F remote access w rite or read select
0:Write
1:Read
1'b0
M
0x0041
-
[7]
reserved
1
-
-
-
-
0x0041
-
[6:4]
R_2WIRE_WADR_BYTE
3
RW
2-w ire serial I/F remote device's Sub Address (Word Address,
register address) Byte w idth select.
address Byte w idth=R_2WIRE_WADR_BYTE<2:0>+1
0 : 1Byte= 8bit Sub addr.(refgister addr.)
1 : 2Byte=16bit Sub addr.(refgister addr.)
4 : 5Byte=40bit Sub addr.(refgister addr.), etc.
3'd0
M
0x0041
-
[3:0]
R_2WIRE_DATA_BYTE
4
RW
2-w ire serial I/F remote access data Byte number
Byte Number = R_2WIRE_DAT 1
(e.g. 0x2 for 3byte burst)
[w rite rule]
R_2WIRE_WAR_2WIRE_DATA_BYTE =< 'd16
[read rule]
R_2WIRE_DATA_BYTE=<'d16
4'd0
M
0x0042
-
[7:1]
reserved
7
-
-
-
-
0x0042
-
[0]
R_2WIRE_CLKSEN
1
RW
2-w ire serial I/F local response clock stretching Enable
0: Sub-Link Master (2-w ire slave) No clock stretching
1: Sub-Link Master (2-w ire slave) clock stretching Enable
*2-w ire Pass Through mode forces clock stretching Enable
1'b0
M
0x0043
-
[7:1]
reserved
7
-
-
-
-
0x0043
-
[0]
R_2WIRE_START
1
W
2-w ire serial I/F remote access start trigger
-
M
-
-
[7:0]
reserved
8
-
-
-
-
-
-
[7:0]
reserved
8
-
-
-
-
-
-
[7:0]
reserved
8
-
-
-
-
-
-
[7:0]
reserved
8
-
-
-
-
-
0x00C8
[7:1]
reserved
7
-
-
-
-
-
0x00C8
[0]
R_2WIRE_BUS_CLR
1
W
2-w ire serial I/F remote side bus clear
Write 1: 2-w ire bus clear action triggered from Sub-Link Slave (2-
w ire master) to 2-w ire slave device connected to Sub-Link Slave.
This bit is automatically cleared into 0 after reset action. 0 is
alw ays read.
-
S
-
0x00C9
[7:0]
R_2WIRE_SCL_HW
8
RW
SCL High w idth [tHIGH] setting on Sub-Link Slave side.
Output SCL High w idth is defined as below .
16×{R_2WIRE_SCL_HW<7:0>+1} * tOSC
8'd31
S
-
0x00CA
[7:0]
R_2WIRE_SCL_LW
8
RW
SCL Low w idth [tLOW] setting on Sub-Link Slave side.
Output SCL Low w idth is defined as below .
16×{R_2WIRE_SCL_LW<7:0>+1} * tOSC
8'd31
S
Sub-Link
