Texas Instruments TSW14J10, Руководство пользователя

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Introduction
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2 SLAU580B – June 2014 – Revised September 2016
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TSW14J10 FMC-USB Interposer Card
19 ADC12J4000EVM GUI
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20 LMK04828 Address 0x100
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21 LMK04828 Address 0x110
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22 HSDC Pro GUI
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23 Captured Results for the ADC12J4000 in Bypass Mode
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24 ADC12J4000EVM, TSW14J10EVM and ZC706 board
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25 Captured Results for the ADC12J4000 in Bypass Mode
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26 DAC38J84EVM, TSW14J10EVM and ZC706 Board
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27 Serial Number Selection Window
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28 HSDC Pro GUI
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29 HSDC Pro GUI
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List of Tables
1 TSW14J10 Jumper Descriptions
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2 FPGA FMC Connector (J5) Description of the TSW14J10
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3 ADC/DAC EVM FMC Connector (J4) Description of the TSW14J10
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1 Introduction
The Texas Instruments TSW14J10 Evaluation Module (EVM) allows users to operate the High Speed
Data Converter Pro Graphic User Interface (HSDC Pro GUI) Software on certain Xilinx
®
and Altera
®
development kits that incorporate the FMC connector. This FMC-FMC adapter has a four bus FTDI USB-
to-GPIO device, that when connected to a PC, provides an interface to the FPGA on the development
platform allowing the HSDC Pro GUI to operate as if it were connected to a TI development board. The
TSW14J10 is compatible with all TI ADC and DAC JESD204B-based EVMs. Contact FPGA vendors for
other available firmware not provided by HSDC Pro Software to test ADC and DAC EVMs with their
development platform.
2 Functionality
The TSW14J10 uses two industry standard FMC connectors that provide an interface between an FMC-
based development board and all TI JESD204B ADC and DAC EVMs. To acquire data, receive data, and
do register read and writes using a host PC, the FPGA transmits and receives data across three Serial
Peripheral Interface (SPI) busses using dedicated pins on the FMC that connect to the FTDI on the
TSW14J10. The fourth bus connects to a JTAG connector. When connecting the provided cable between
this connector and a JTAG connecter on a FPGA development platform, the HSDC Pro GUI can be used
to configure the FPGA. This interface is also routed to the FMC connector when setting jumpers to the
appropriate configuration (see
Table 1 ).
The TSW14J10 routes the SPI busses through level translators that allow the signals going to the FPGA
development board and the ADC/DAC EVM to be either 3.3-V or 1.8-V levels. All devices on the
TSW14J10 are powered from the USB connection.
Figure 1 shows an ADS42JB69EVM connected to a Xilinx Kintex
®
KC705 development board using a
TSW14J10EVM.