SLUU131A – September 2002 – Revised February 2003
7
TPS40001 Based Converter Delivers 10-A Output
4.4
Output Capacitor Selection
Selection of the output capacitor is based on many application variables, including function, cost, size, and
availability. First, the minimum allowable output capacitance should be determined by the amount of inductor
ripple current and one-half the allowable output ripple, as given in equation (4).
C
OUT(min)
+
I
RIPPLE
8
f
V
RIPPLE
+
4 A
8
300 kHz
25 mV
+
67
m
F
This only affects the capacitive component of the ripple voltage. In addition, the voltage component due to the
capacitor ESR must be considered, shown in equation (5).
ESR
Cout
v
V
RIPPLE
I
RIPPLE
+
25 mV
4 A
+
6.25 m
W
To minimize capacitor size while maintaining good transient response, two 470-
µ
F POSCAPs (with an ESR of
10 m
Ω
each) are fitted in paralleled with a 1-
µ
F ceramic capacitor.
4.5
MOSFET Selection
One constraint of this design is the use of one SO-8 MOSFET in the upper switch device and one SO-8 in the
lower synchronous rectifier location in the buck converter power stage. The upper device loss is usually
dominated by switching loss, so a device with lower gate charge and switching times was selected. Since this
application has a relatively high output voltage, the upper device runs at a high duty cycle and needs to have
a low R
DS(on)
to keep conduction losses low, and an 8-m
Ω
device with a maximum gate charge of 30 nC is
selected. The same device is fitted in the bottom switch location to achieve high efficiency.
4.6
Short Circuit Protection
The TPS40003 implements short circuit protection by comparing the voltage across the topside MOSFET while
it is on to a voltage dropped from VDD by R
LIM
due to an internal current source of 15
µ
A inside pin 1. Due to
tolerances in the current source and variations in the power MOSFET on-voltage versus temperature, the short
circuit level can protect against gross overcurrent conditions only, and should be set much higher than rated
load. In this particular case, R
LIM
is selected as shown in equation (6).
R
LIM
+
R2
+
3
I
OUT
R
DS(on)
15
m
A
+
3
10 A
0.008
W
15
m
A
+
15 k
W
For this design, a standard value of 16.2 k
Ω
is selected for R2. The factor of 3 in the equation accounts for the
variations in component tolerances (both initial and over temperature) and output current ripple. The component
tolerances include MOSFET R
DS(on)
, I
LIM
sink current, and the V
OS
offset voltage of SW vs I
LIM
. The high
currents that are switched under short circuit conditions may cause SW pin 8 to be driven below ground several
volts, possibly injecting substrate current which can cause improper operation of the device. A 3.3-
Ω
resistor
has been placed in series with this pin to limit its excursion to safe levels.
(4)
(5)
(6)
