TMS320F280x SDFlash Programming Utilities
F280x SDFlash Algo V1.1
Texas Instruments Inc. 16
7.4. If your system requires any other custom setup such as modifying the CLKINDIV bit then:
Open the SDFlash280x_Main.c file. The code that is executed on startup to setup the PLL is at the
beginning of the main() function within this file. Modify this function as required for your clock
requirements.
7.5.
Rebuild each of the algorithms in CCS by selecting Project->Rebuild all.
CAUTION
It is important to rebuild all of the algorithm files: erase, program, verify and depletion
recovery.
7.6.
Exit Code Composer Studio
7.7.
Run the CPU frequency and PLL multiplier configuration toggle test described in section 9.3
from SDFlash to verify the configuration.
When run, this test will toggle a selected GP I/O pin at a known frequency. This will allow you to
confirm that the algorithms are properly configured for the CPU frequency and PLL multiplier you
specified.
CAUTION
It is strongly recommended that you test the CPU frequency and PLL configuration
using the configuration toggle test described in section 9.3 before erasing or
programming any parts.
If this test fails, DO NOT PROCEED to erase or program the flash until the problem is
corrected, or flash damage can occur.
The SDFlash algorithm file should now be configured for your hardware’s frequency requirements.
