Texas Instruments TMDS243DC01EVM Скачать руководство пользователя страница 12

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Table 3-4. 150 Pin HSE Connector (SEAM-30-03.5-L-05-2-A-K-TR) (continued)

Pin Name

Net Name

Pin Name

Net Name

PRG0_MDIO0_MDC

DGND

PRG0_PRU0GPO8

PRG0_PRU0GPO7

PRG0_PRU0GPO2

PRG0_PRU0GPO17

PRG0_PRU0GPO3

PRG0_PRU0GPO18

A10

DGND

B10

DGND

A11

PRG0_PRU1GPO1

B11

PRG0_PRU0GPO19

A12

PRG0_PRU1GPO0

B12

PRG0_PRU0GPO0

A13

PRG0_PRU0GPO4

B13

PRG0_PRU1GPO4

A14

PRG0_PRU0GPO12

B14

PRG0_PRU0GPO11

A15

PRG0_PRU1GPO16

B15

PRG0_PRU1GPO12

A16

DGND

B16

DGND

A17

PRG0_HSE_ETH1_CLK

B17

PRG0_HSE_ETH2_CLK

A18

DGND

B18

DGND

A19

GPMC0_AD15

B19

DGND

A20

HSE_GPIO0_36

B20

GPMC0_AD14

A21

GPMC0_AD9

B21

GPMC0_AD10

A22

GPMC0_AD8

B22

HSE_GPIO0_31

A23

DGND

B23

DGND

A24

DGND

B24

HSE_GPIO0_35

A25

DGND

B25

DGND

A26

B26

DGND

A27

VCC3V3_IO_HSE

B27

DGND

A28

VCC3V3_IO_HSE

B28

DGND

A29

VCC3V3_IO_HSE

B29

HSE_PRG0_PRU0_GPO10

A30

B30

DGND

SOC_SPI1_CLK

SOC_SPI1_CS0

VCC1V8_HSE

SOC_SPI1_CS1

VCC1V8_HSE

MCU_RESETZ

DGND

PRG0_PRU0GPO13

PRG0_PRU1GPO13

PRG0_PRU0GPO5

PRG0_PRU1GPO5

DGND

PRG0_PRU1GPO3

PRG0_PRU0GPO6

PRG0_PRU0GPO14

PRG0_PRU1GPO2

C10

DGND

D10

DGND

C11

PRG0_PRU1GPO15

D11

PRG0_PRU1GPO11

C12

PRG1_PRU1GPO19

D12

PRG0_PRU0GPO15

C13

DGND

D13

DGND

C14

GPMC0_AD2

D14

GPMC0_AD1

C15

GPMC0_AD5

D15

GPMC0_AD4

C16

DGND

D16

DGND

C17

DGND

D17

GPMC0_AD7

C18

DGND

D18

GPMC0_CSN2

C19

DGND

D19

GPMC0_CSN3

C20

DGND

D20

DGND

C21

GPMC0_AD12

D21

GPMC0_AD13

System Description

www.ti.com

TMDS64DC01EVM and TMDS243DC01EVM User's Guide

SPRUJ06 – OCTOBER 2021

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Содержание TMDS243DC01EVM

Страница 1: ... Diagram 7 Figure 3 5 Power Input 11 List of Tables Table 1 1 TMDS64DC01EVM and TMDS243DC01EVM Feature Comparison 2 Table 2 1 TMDS64DC01EVM and TMDS243DC01EVM PCB Design Revisions and Assembly Variants 3 Table 3 1 TMDS64DC01EVM and TMDS243DC01EVM Key Features 4 Table 3 2 Functionality Selected by J11 Header 6 Table 3 3 HSE Connector Signal Routing 9 Table 3 4 150 Pin HSE Connector SEAM 30 03 5 L 0...

Страница 2: ...e configuration and diagnostics An unshielded three wire cable as long as 20 meters normally equipped with M12 connectors establishes an IO Link connection Data rates range up to 230 kbps with a nonsynchronous minimum cycle time of 400 μs 10 Four operating modes support bidirectional input output I O digital input digital output and deactivation Security mechanisms and deterministic data delivery ...

Страница 3: ...plements only the breakout section of the board PROC102A 0011 First production release of the AM64x EVM IO Link and High Speed Expansion Board Implements both the breakout and IO Link sections of the board PROC102A 002 First production release of the AM243x EVM High Speed Expansion Board Implements only the breakout section of the board 1 The TMDS64D01EVM E1 boards do not have a sticker indicating...

Страница 4: ...M s HSE connector on standard 0 1 header pins Yes Yes Signal routing of HSE connector signals between Test Headers and IO Link section via user configurable FET switches Yes Yes Large prototyping area with 0 1 pitch holes Yes Yes Precision current monitoring with onboard INA253 Yes No not populated System Description www ti com 4 TMDS64DC01EVM and TMDS243DC01EVM User s Guide SPRUJ06 OCTOBER 2021 S...

Страница 5: ...block diagram of the IO Link Breakout Board Figure 3 2 TMDS64DC01EVM Functional Block Diagram www ti com System Description SPRUJ06 OCTOBER 2021 Submit Document Feedback TMDS64DC01EVM and TMDS243DC01EVM User s Guide 5 Copyright 2021 Texas Instruments Incorporated ...

Страница 6: ...FET switches are controlled using the J11 Header Connecting the control signal of all the MUXes to ground routes all signals from the HSE connector to the Breakout board whereas connecting the control signal to VCC3V3_IO_HSE routes all signals from the Mux to the IO Link section Table 3 2 Functionality Selected by J11 Header J11 Header Selection Functionality Supported Board Short J11 pins 1 and 2...

Страница 7: ...port master this design consists of eight M12 connectors and eight TIOL111DMWR IO Link PHYs and associated LEDs The IO Link circuit is supported by two TPS4H160BQPWPRQ1 Quad channel smart high side switches for the L signals and a SN65HVS882 serializer to support the D signals The D signals are connected to a 10 pin header J21 for testing purpose Both parts require a 24V which is supplied by a pow...

Страница 8: ...LIM Thus changing the current limit requires the change of RLIM to a different value via RLIM n VREF I LIM While the device is specified for a current limit of 3 6 mA via RLIM 25 kΩ The DI signals from the M12 connectors are connected to the input channels of the serializer The serializer is SPI compatible Upon a low level at the load input LD the information of the field inputs IP0 to IP7 is latc...

Страница 9: ...PO6_HDR J4 PRG0_PRU1GPO8 EN_PHY_2 PRG0_PRU1GPO8_HDR PRG0_PRU1GPO11 EN_PHY_3 PRG0_PRU1GPO11_HDR J5 PRG0_PRU1GPO12 EN_PHY_4 PRG0_PRU1GPO12_HDR PRG0_PRU1GPO13 EN_PHY_5 PRG0_PRU1GPO13_HDR PRG0_PRU1GPO14 EN_PHY_6 PRG0_PRU1GPO14_HDR PRG0_PRU1GPO15 EN_PHY_7 PRG0_PRU1GPO15_HDR PRG0_PRU1GPO16 EN_PHY_8 PRG0_PRU1GPO16_HDR PRG0_PRU1GPO2 U7 EN_L 5 PRG0_PRU1GPO2_HDR J4 PRG0_PRU0GPO18 EN_L 1 PRG0_PRU0GPO18_HDR P...

Страница 10: ...I_HDR SOC_SPI1_CLK SOC_SPI1_CLK_SE LED SOC_SPI1_CLK_HDR SOC_SPI1_CS0 SOC_SPI1_CS0_SE SOC_SPI1_CS0_HDR SOC_SPI1_CS1 LATCH SOC_SPI1_CS1_HDR HSE_MCAN1_RX I2C3_SDA HSE_MCAN1_RX I2C3_SDA J3 HSE_MCAN1_TX I2C3_SCL HSE_MCAN1_TX I2C3_SCL HSE_MCAN0_TX UART4_RXD HSE_MCAN0_TX UART4_RXD HSE_MCAN0_RX UART4_TXD HSE_MCAN0_RX UART4_TXD GPMC0_ADC 8 9 GPMC0_ADC 8 9 J6 GPMC0_ADC 10 15 GPMC0_ADC 10 15 J7 GPMC0_CSN2 GP...

Страница 11: ... by example UL CSA VDE CCC PSE and so forth 3 3 4 Board Mating Connections The pinout for the mating connectors of the IO Link Breakout Board are listed in Table 3 4 Note The following HSE Connector pin names do not indicate exhaustive SoC Pin functionality For a full list of pin and signal functions see the device specific GP EVM User s Guide and data sheet Table 3 4 150 Pin HSE Connector SEAM 30...

Страница 12: ..._GPIO0_35 A25 DGND B25 DGND A26 B26 DGND A27 VCC3V3_IO_HSE B27 DGND A28 VCC3V3_IO_HSE B28 DGND A29 VCC3V3_IO_HSE B29 HSE_PRG0_PRU0_GPO10 A30 B30 DGND C1 SOC_SPI1_CLK D1 SOC_SPI1_CS0 C2 VCC1V8_HSE D2 SOC_SPI1_CS1 C3 VCC1V8_HSE D3 MCU_RESETZ C4 DGND D4 DGND C5 PRG0_PRU0GPO13 D5 PRG0_PRU1GPO13 C6 PRG0_PRU0GPO5 D6 PRG0_PRU1GPO5 C7 DGND D7 DGND C8 PRG0_PRU1GPO3 D8 PRG0_PRU0GPO6 C9 PRG0_PRU0GPO14 D9 PRG...

Страница 13: ...C0_DIR E4 HSE_DETECT E19 GPMC0_CSN1 E5 DGND E20 DGND E6 DGND E21 GPMC0_AD11 E7 DGND E22 DGND E8 PRG0_PRU0GPO1 E23 HSE_PRG0_PRU1_GPO9 E9 PRG0_PRU0GPO16 E24 HSE_MCAN0_RX UART4_TXD E10 DGND E25 DGND E11 PRG0_PRU1GPO6 E26 HSE_GPIO0_38 E12 PRG0_PRU1GPO14 E27 HSE_PRG0_PRU1_GPO10 E13 PRG1_PRU1GPO18 E28 DGND E14 GPMC0_AD0 E29 DGND E15 GPMC0_AD3 E30 MCU_PORZ Table 3 5 20 Pin ADC Connector 68683 310LF Pin N...

Страница 14: ... of the Transceiver Affected PCB version E1 Board Modification Sticker M1 Severity High The original design of the IO Link breakout board resulted in occasional voltage spikes on the TX line of the transceiver A fix was implemented by rotating transistors Q4 Q5 Q6 Q7 Q8 Q9 Q10 and Q11 and adding a diode in line with Pin 1 of the transistor This Mod was applied to all boards shipped with a 1st revi...

Страница 15: ...other than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control techniques are used to the extent TI deems necessary TI does not test all parameters of each EVM User s claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects...

Страница 16: ... These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation...

Страница 17: ...y for convenience and should be verified by User 1 Use EVMs in a shielded room or any other test facility as defined in the notification 173 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after User obtains the license of Test Radio Station as provided in R...

Страница 18: ... any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees affiliates contractors or designees 4 4 User assumes all...

Страница 19: ...OR DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthermore no return of EVM s will be accepted if the package has been opened and no return of the EVM s will be accepted if they are damaged or otherwise not in a resalable condition If User feels it has...

Страница 20: ...o change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you will fully indemn...

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