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General PowerPAD

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 Design Considerations

1-15

General Information

1.9

General PowerPAD

t

 Design Considerations

The THS7001 IC is mounted in a special package incorporating a thermal pad
that transfers heat from the IC die directly to the PCB. The PowerPAD package
is constructed using a downset leadframe. The die is mounted on the
leadframe but is electrically isolated from it. The bottom surface of the lead
frame is exposed as a metal thermal pad on the underside of the package and
makes physical contact with the PCB. Because this thermal pad is in direct
physical contact with both the die and the PCB, excellent thermal performance
can be achieved by providing a good thermal path away from the thermal pad
mounting point on the PCB.

Although there are many ways to properly heatsink this device, the following
steps illustrate the recommended approach as used on the THS7001 EVM,
which is built on a multilayer PCB with an internal ground plane.

1) Prepare the PCB with a top side etch pattern as shown in Figure 1–11.

There should be etch for the leads as well as etch for the thermal pad.

Figure 1–11. PowerPAD PCB Etch and Via Pattern

Thermal pad area (0.12 x 0.17) with 8 vias
(Via diameter = 13 mils)

2) Place 8 holes in the area of the thermal pad. These holes should be 13 mils

in diameter. They are kept small so that solder wicking through the holes
is not a problem during reflow.

3) Additional vias under the package, but outside the thermal pad area, will

improve heat transfer but are not required. These holes should be 25 mils
in diameter. They may be larger because they are not in the area to be
soldered so that wicking is not a problem.

4) Connect all holes, the 8 within the thermal pad area and any others outside

the pad area, to the internal ground plane.

5) When connecting these holes to the ground plane, do not use the typical

web or spoke via connection methodology. Web connections have a high
thermal resistance connection that is useful for slowing the heat transfer
during soldering operations. This makes the soldering of vias that have
plane connections easier. However, in this application, low thermal
resistance is desired for the most efficient heat transfer. Therefore, the
holes under the THS7001 package should make their connection to the
internal ground plane with a complete connection around the entire
circumference of the plated through hole.

Содержание THS7001

Страница 1: ...THS7001 Programmable Gain Amplifier Evaluation Module December 1999 Mixed Signal Products User s Guide SLOU057...

Страница 2: ...ONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH PERSONAL INJURY OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE CRITICAL APPLICATIONS TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED AUTHORIZED OR WARRANT...

Страница 3: ...in a laboratory test environment only It generates uses and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of par...

Страница 4: ...iv...

Страница 5: ...1 4 EVM DIP Switch Functionality 1 8 1 5 EVM Circuit Configuration 1 9 1 6 Using The THS7001 EVM 1 10 1 7 THS7001 EVM Performance 1 11 1 8 General High Speed Amplifier Design Considerations 1 14 1 9...

Страница 6: ...e VCC 5 V 1 12 1 9 THS7001 EVM Preamplifier PGA Response VCC 15 V 1 13 1 10 THS7001 EVM Preamplifier PGA Response VCC 5 V 1 13 1 11 PowerPAD PCB Etch and Via Pattern 1 15 1 12 Maximum Power Dissipatio...

Страница 7: ...nfiguring connecting and using the EVM and a discussion on high speed amplifier and PowerPAD package design considerations Topic Page 1 1 Features 1 2 1 2 Description 1 2 1 3 Programmable Gain Amplifi...

Страница 8: ...rogrammable gain amplifier evaluation module EVM is a complete low noise receiver and a highly configurable programmable gain amplifier circuit It consists of the TI THS7001 programmable gain amplifie...

Страница 9: ...JP1 R6 C6 R20 C7 C12 R2 R41 R23 R25 R27 R29 R31 JP2 C8 1999 Texas Instruments J4 J3 J2 J1 SLOP250 THS7001 EVM Board R8 GND 1 R7 C1 C3 R1 A C13 C14 Input power is applied to the EVM through banana jac...

Страница 10: ...TP8 S D TP7 C19 0 1 F 15 V R23 330 R25 330 R27 330 R24 3 3 k R26 3 3 k R28 3 3 k 3 2 1 TP5 VH R41 49 9 R42 4 7 k R31 49 9 R32 4 7 k R44 100 J9 PGA A Output VL TP6 S1 F 15 V 5 V 15 V JP3 G2 TP3 C17 0 1...

Страница 11: ...can easily be changed to support different applications by changing the resistor ratios Although any of the components on the EVM board can be replaced with different values it is imperative that the...

Страница 12: ...PGA Gain dB PGA Gain V V 0 0 0 22 0 08 0 0 1 16 0 16 0 1 0 10 0 32 0 1 1 4 0 63 1 0 0 2 1 26 1 0 1 8 2 52 1 1 0 14 5 01 1 1 1 20 10 One aspect of the THS7001 PGA signal input that must be considered...

Страница 13: ...linear input range and saturation characteristics of most ADCs the PGA output incorporates a voltage clamp These clamps are typically connected to the power supply pins to allow a full output range Ho...

Страница 14: ...onality SWITCH LABEL POSITION DESCRIPTION S1 A A G0 0 PGA Gain Bit 0 LSB Value 0 Low S1 A A G0 1 PGA Gain Bit 0 LSB Value 1 High S1 B A G1 0 PGA Gain Bit 1 Value 0 Low S1 B A G1 1 PGA Gain Bit 1 Value...

Страница 15: ...2 Jumper JP1 J 1 2 Connects the input of the PGA U1 B to the input A BNC J6 bypassing the THS7001 preamplifier U1 A J 2 3 Connects the input of A channel PGA U1 B to the output of the A channel pream...

Страница 16: ...onnect an oscilloscope probe to the PGA A amplifier output BNC J9 Connecting directly to J9 with a 50 nominal impedance cable and probe is not recommended The output drive capability of the PGA is ver...

Страница 17: ...ndwidth of the preamplifier with a 15 V power supply is 100 MHz and 90 MHz with a 5 V power supply Figure 1 5 THS7001 EVM Preamplifier Response VCC 15 V f Frequency Hz 100k 1M 10M 100M 6 4 2 7 5 3 1 5...

Страница 18: ...2 dB Typical 3 dB bandwidth is 70 MHz with a 5 V power supply and 80 MHz with a 15 V power supply Figure 1 7 THS7001 EVM PGA Response VCC 15 V f Frequency Hz 100k 1M 10M 100M 3 1 1 4 2 0 2 500M VO 0 4...

Страница 19: ...input The PGA was set to a gain of 2 dB Typical 3 dB bandwidth is 70 MHz with a 5 V power supply and 80 MHz with a 15 V power supply Figure 1 9 THS7001 EVM Preamplifier PGA Response VCC 15 V f Freque...

Страница 20: ...ce and reduce ground plane noise coupling into these pins This is especially important for the inverting pin while the amplifier is operating in the noninverting mode Because the voltage at this pin s...

Страница 21: ...rmal pad Figure 1 11 PowerPAD PCB Etch and Via Pattern Thermal pad area 0 12 x 0 17 with 8 vias Via diameter 13 mils 2 Place 8 holes in the area of the thermal pad These holes should be 13 mils in dia...

Страница 22: ...depends on the application In the example above if the size of the internal ground plane is approximately 3 inches 3 inches then the expected thermal coefficient JA is about 32 6_C W For a given JA th...

Страница 23: ...roper thermal management when using PowerPAD mounted devices Correct PCB layout and manufacturing techniques are critical for achieving adequate transfer of heat away from the PowerPAD IC package More...

Страница 24: ...Input voltage VI VCC max Output drive THS7001 Preamplifier IO 95 mA typ Output drive THS7001 PGA IO 50 mA typ Continuous total power dissipation at TA 25 C 3 8 W max For complete THS7001 amplifier IC...

Страница 25: ...ence This chapter includes a parts list and PCB layout illustrations for the THS7001 EVM Topic Page 2 1 THS7001 Dual Differential Line Drivers and Receivers EVM Parts List 2 2 2 2 THS7001 EVM Board La...

Страница 26: ...NG JUMPERS 0 1 CTRS FOR 0 025 SQ PINS 3 SW1 6PST DIP SWITCH CTS 219 NST Series Gold Finish 1 DIGI KEY CT2196MST ND R6 RESISTOR 0 1 8 W 1 SM 0805 1 R18 R31 R41 RESISTOR 49 9 1 10 W 1 SM 0805 3 R5 R9 RE...

Страница 27: ...1 EVM Board Layouts Board layout examples of the THS7001 EVM PCB are shown in the following illustrations They are not to scale and appear here only as a reference Figure 2 1 THS7001 EVM PC Board Top...

Страница 28: ...THS7001 EVM Board Layouts 2 4 Reference Figure 2 3 THS7001 EVM PC Board Bottom Layer Top VIew...

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