THS1031
3-V TO 5.5-V, 10-BIT, 30 MSPS
CMOS ANALOG-TO-DIGITAL CONVERTER
SLAS242E – NOVEMBER 1999 – REVISED MARCH 2002
23
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
operating configuration examples (continued)
In Figure 25, the input signal is differential, so Mode = AV
DD
/2 (differential mode) is set to allow the inverse signal
to be applied to REFTS and REFBS. The differential input goes from – 0.8 V to 0.8 V, giving a total input signal
span of 1.6 V. Using a PGA gain of 1, REFTF – REFBF should therefore, equal 1.6 V. REFSENSE is connected
to resistors RA and RB (external divider mode) to make VREF = 1.6 V, that is R
A
/R
B
= 0.6 (see Figure 22).
AIN
REFTS
REFBS
REFTF
REFBF
REFSENSE
MODE
1.4 V
0.6 V
0.1
µ
F
10
µ
F
0.1
µ
F
0.1
µ
F
VREF = 1.6 V
RA
RB
1 V
1.4 V
0.6 V
1 V
AIN+
AIN–
AVDD
2
Figure 25. Differential Operation
Figure 26 shows a center span configuration for an input waveform swinging between 0.2 and 1.9 V. Pins
REFTS and REFBS are connected to a voltage source of 1.05 V, equal to the mid-scale of the input waveform.
With the PGA gain set to its default value of 1, REFTF – REFBF should be set equal to the span of the input
waveform, 1.7 V, so VREF is connected to an external source of 1.7 V. REFSENSE must be connected to AV
DD
to disable the ORG output to VREF (see Figure 23) to allow this external source to be applied.
AIN
REFTS
REFBS
REFTF
REFBF
REFSENSE
MODE
1.9 V
0.2 V
0.1
µ
F
10
µ
F
0.1
µ
F
0.1
µ
F
1.05 V
DC SOURCE = 1.05 V
VREF
DC SOURCE = 1.7 V
AVDD
AVDD
2
Figure 26. Center Span Operation
