Schematic Diagram
3-2
3.1
Schematic Diagram
Figures 3–1 through 3–5 show the schematic diagram for the EVM. The follow-
ing paragraphs describe the EVM circuits.
Figure 3–1. EVM Schematic Diagram
DAC[9:0]
PGA[2:0]
POWERDOWN
IECLAMP
BIN2OUT
CLAMPDIS
AGND
+5 V
DAC[9:0]
PGA[2:0]
POWERDOWN
IECLAMP
BIN2OUT
CLAMPDIS
DIPS
LOGIC
IO[9:0]
LWR
LOEB
OVR
CLK
+ 5 V
DRVDD
AGND
THS1031
IO[9:0]
LWR
LOEB
OVR
AVDD
AGND
DRVDD
CLK
EXT_T
EXT_B
COM
EXT_T
EXT_B
COM
AVDD
DRVDD
+ 5 V
+ 3 V to 5 VA
AGND
POWER_&_REF
Содержание THS1030/31EVM
Страница 4: ...iv...
Страница 8: ...viii...
Страница 12: ...1 4...
Страница 15: ...PCB Layout 2 3 Physical Description Figure 2 2 Silk Bottom...
Страница 16: ...PCB Layout 2 4 Figure 2 3 Top...
Страница 17: ...PCB Layout 2 5 Physical Description Figure 2 4 Inner 1...
Страница 18: ...PCB Layout 2 6 Figure 2 5 Inner 2...
Страница 19: ...PCB Layout 2 7 Physical Description Figure 2 6 Bottom...
Страница 22: ...2 10...
Страница 38: ...4 8 Modes of Operation...