Texas Instruments THS1030/31EVM, Руководство пользователя

Страница: 29 / 39

Circuit Function
3-7
Circuit Description
74AHC14 hex inverter IC (U4), then it should be ac-coupled through C24, with
its dc level trimmed using potentiometer P1 if necessary.
3.2.2 Clock Options
The EVM provides flexibility as to the source of the ADC conversion clock: this
can come from an external source as described above, or from a crystal-oscil-
lator module when U3 is populated with a standard DIL14 HCMOS.
Note:
Care should be taken when selecting a crystal oscillator module to make
sure that it operates at the AVDD supply voltage being used.
To synchronize the output data from the ADC to external circuitry, a buffered
version of the conversion clock is provided to output header J4 via U4 and U8.
The phase relationship between the conversion clock and the output clock can
be selected using header H3.
3.2.3 References
In addition to the capability to configure the on-chip reference via jumpers, a
reference circuit has been included on the EVM. This uses a 1.2-V shunt refer-
ence diode (D1) as its primary source, and allows adjustment of the REFTS
and REFBS signals to the ADC using potentiometers P2 and P3, respectively.
The ranges of the external reference signals are: REFTS, 0.60 V to 2.68 V on
a 2.7-V supply, and 0.60 V to 4.85 V on a 5-V supply; REFBS, 0 V to 1.79 V
on a 2.70-V supply, and 0V to 2.00V on a 5 V supply. See Chapter 4 for further
details on the jumper settings required to use this mode.
3.2.4 Power
Power is supplied to the EVM via 4-mm banana sockets. Separate input con-
nectors are provided for the analog (J8) and digital (J6) supplies to the device,
and for the reference (J7) and output buffer (J9) circuits. The supply for J9
should be 5 V, with the supply for J6, J7, and J8 being between 2.7 V and 5.5 V.
Power-supply return paths (GND) are via connectors J10 and J11. Each of
these supplies is independent, but it should be noted that the input thresholds
of the ADC will vary depending on the digital and analog supply voltages, in
accordance with the data sheet specifications.
3.2.5 Outputs
The data outputs from the ADC are buffered using SN74LVCC4245A before
going to header J4. This allows the supplies on the THS1030/31 to be varied
without affecting the output signal levels. Header J4 is a standard 40-pin de-
vice on a 100-mil grid, and allows easy connection to a logic analyzer. The con-
nector test points are listed in Table 3–1.