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3.4
System Clock Configuration
3.5
Sampling Mode Selection
Hardware Description and Configuration
Switch SW5 is used to select the system clock source for the PCM4202EVM.
Table 3
summarizes
the available clock source options. The onboard oscillators support standard PCM sampling rates in
Master mode, including 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, and 192kHz. The external
clock input (connector J7) may be used to supply alternate system clock frequencies that support
alternative sample rates.
Table 3. System Clock Source Selection
Switch SW5
System Clock Source
Used for Master or Slave Mode Operation?
EXT
OSC1
OSC0
LO
LO
LO
External clock input at J7
Master
HI
LO
LO
External clock input at the SCKI pin of header J4 Slave
HI
LO
HI
Oscillator X1, 22.5792MHz
Master
HI
HI
LO
Oscillator X2, 22.576MHz
Master
The sampling mode of the PCM4202 is selected using switch SW1.
Table 4
through
Table 6
summarize the available sampling modes for both PCM and DSD output modes.
Single Rate sampling mode is designed for output sampling rates up to 54kHz. The modulator
oversampling rate is set to 128x.
Dual Rate sampling mode is designed for output sampling rates greater than 54kHz and up to
108kHz. The modulator oversampling rate is set to 64x.
Quad Rate sampling mode is designed for output sampling rates greater than 108kHz and up to
216kHz. The modulator oversampling rate is set to 32x.
10
PCM4202EVM User's Guide
SBAU103 – August 2004
