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1.3

Related Documentation from Texas Instruments

1.4

Additional Documentation

Introduction

Manual reset circuits are provided for both the PCM4202 (U1) and the AES3 transmitters (U12 and

U13). The ADC RESET switch (SW2) is utilized for resetting the A/D converter, while the DIT

RESET switch (SW4) is utilized for resetting the AES3 transmitters.
The system or master clock for the evaluation module may be generated onboard or by an external

clock source. Oscillators X1 and X2 operate at fixed clock frequencies of 22.5792MHz and

24.576MHz, respectively. The oscillators provide low jitter clock sources for measuring the

performance of the PCM4202 in Master mode operation. Alternatively, an external clock source

may be connected at J7 for Master mode operation, supporting alternate system clock and

sampling frequencies. For Slave mode operation, the system clock is provided from an external

source through header J4 and buffer U9. Switch SW5 provides clock configuration control for the

oscillators and the external clock input at connector J7.

The following documents provide information regarding Texas Instrument integrated circuits used in

the assembly of the PCM4202EVM. The latest revisions of these documents are available from the

TI web site at

http://www.ti.com.

Data Sheet

Literature Number

PCM4202 Datasheet

SBAS290

DIT4192 Datasheet

SBOS229

OPA227 Datasheet

SBOS110

OPA1632 Datasheet

SBOS286

REG1117 Datasheet

SBVS001

SN74AHC08 Datasheet

SCLS236

SN74AHC14 Datasheet

SCLS238

SN74ALVC245 Datasheet

SCES271

SN74LVC1G125 Datasheet

SCES223

The following documents or references provide information regarding selected non-TI components

used in the assembly of the PCM4202EVM. These documents are available from the corresponding

manufacturer.

Document/Reference

Manufacturer

SM7745H Series CMOS Oscillators

Pletronics (

http://www.pletronics.com

)

SBAU103–August 2004

PCM4202EVM User's Guide

Содержание PCM4202EVM

Страница 1: ...t connections an electrical schematic PCB layout drawings and a bill of materials BOM for the EVM Contents 1 Introduction 3 2 Getting Started 7 3 Hardware Description and Configuration 8 4 Schematic PCB Layout and Bill of Materials 13 List of Figures 1 PCM4202 Functional Block Diagram 3 2 PCM4202EVM Functional Block Diagram 5 3 DIT Transmitter Reset Circuitry 13 4 PCM4202EVM Schematic Diagram 14 5...

Страница 2: ...Digital Interface Transmitter Configuration 12 9 Transmitter Master Clock Configuration 12 10 Transmitter Output Mode Configuration 12 11 PCM4202EVM Bill of Materials 22 PCM4202EVM User s Guide 2 SBAU103 August 2004 ...

Страница 3: ...ications The PCM4202 features 1 bit delta sigma Σ modulators employing a novel density modulated dithering scheme yielding improved dynamic performance Differential voltage inputs are utilized for the modulators providing excellent common mode rejection On chip voltage references are provided for the modulators in addition to generating DC common mode bias voltage outputs for use with external inp...

Страница 4: ...linear PCM data interface for external hardware and signal processors Sampling rates up to 216kHz are supported Two onboard system clock oscillators operating at 22 5792MHz and 24 576MHz respectively supporting standard PCM sampling rates including 44 1kHz 48kHz 88 2kHz 96kHz 176 4kHz and 192kHz External system clock inputs supporting alternative sampling rates up to 216kHz The PCM4202EVM requires...

Страница 5: ...uts is buffered and filtered using a low noise input circuit utilizing a Texas Instruments OPA1632 fully differential amplifier The output of each buffer circuit is connected to a corresponding differential input of the PCM4202 The PCM4202 is then used to convert the analog signal to either a 24 bit linear PCM or 1 bit DSD representation in the digital domain The 24 bit PCM or 1 bit DSD data outpu...

Страница 6: ...on the system clock is provided from an external source through header J4 and buffer U9 Switch SW5 provides clock configuration control for the oscillators and the external clock input at connector J7 The following documents provide information regarding Texas Instrument integrated circuits used in the assembly of the PCM4202EVM The latest revisions of these documents are available from the TI web...

Страница 7: ... grounded wrist strap at an approved ESD workstation Failure to observe ESD handling procedures may result in damage to EVM components Upon opening the PCM4202EVM package please check to make sure that the following items are included One PCM4202EVM One printed copy of the PCM4202 product datasheet One printed copy of this PCM4202EVM User s Guide If any of these items are missing please contact th...

Страница 8: ...ng the input buffer circuits as well as 5 0V DC for powering the analog section of the PCM4202 All supplies should be rated for at least 500mA of output current The digital supply requires 5 0V DC and should be rated for at least 500mA of output current The 5 0V supply is regulated to 3 3V DC by an onboard Texas Instruments REG1117 linear voltage regulator U6 which is used to power the digital sec...

Страница 9: ...MT1 FMT0 Audio Data Format Slave or Master Mode LO LO 24 Bit Left Justified PCM Data LO HI 24 Bit I2S PCM Data HI LO 24 Bit Right Justified PCM Data HI HI DSD Output Mode Master Mode only PCM4202EVM User s Guide SBAU103 August 2004 9 Master mode may also be configured to support 1 bit DSD formatted audio output data as shown in Table 2 For the DSD mode formats header J4 provides the output interfa...

Страница 10: ...OSC1 OSC0 LO LO LO External clock input at J7 Master HI LO LO External clock input at the SCKI pin of header J4 Slave HI LO HI Oscillator X1 22 5792MHz Master HI HI LO Oscillator X2 22 576MHz Master The sampling mode of the PCM4202 is selected using switch SW1 Table 4 through Table 6 summarize the available sampling modes for both PCM and DSD output modes Single Rate sampling mode is designed for ...

Страница 11: ...2fS HI HI HI Quad Rate with fSCKI 128fS Table 6 Sampling Mode Selection DSD Output Mode FS2 FS1 FS0 Sampling Mode LO LO LO 128fs DSD Output Rate with fSCKI 768fS LO LO HI 128fs DSD Output Rate with fSCKI 512fS LO HI LO 128fs DSD Output Rate with fSCKI 384fS LO HI HI 128fs DSD Output Rate with fSCKI 256fS HI LO LO 64fs DSD Output Rate with fSCKI 384fS HI LO HI 64fs DSD Output Rate with fSCKI 256fS ...

Страница 12: ...es the master clock options for the DIT4192 transmitters using switch SW3 Table 9 Transmitter Master Clock Configuration CLK1 CLK0 Transmitter MCLK Frequency LO LO 128fS LO HI 256fS HI LO 384fS HI HI 512fS The DIT4192 transmitters may be operated in either Stereo or Mono mode In Stereo mode two channels of audio data are transmitted at the input sampling frequency In Mono mode two consecutive samp...

Страница 13: ...DIT4192 transmitters U12 and U13 The transmitters may be reset only when the DIT switch of SW3 is set LO by momentarily pressing and then releasing switch SW4 If the DIT switch is set HI the output of the AND gate in the reset circuit is forced low which will force both transmitters into power down mode The transmitter reset circuit is shown in Figure 3 Figure 3 DIT Transmitter Reset Circuitry Thi...

Страница 14: ...www ti com Schematic PCB Layout and Bill of Materials Figure 4 PCM4202EVM Schematic Diagram PCM4202EVM User s Guide 14 SBAU103 August 2004 ...

Страница 15: ...r 3 Power Layer 4 Bottom Solder Side The ground plane doubles as a heat sink for the PCM4202 PowerPAD package Refer to the product datasheet for more information on the purpose and application of the PowerPAD connection Figure 5 through Figure 10 show the top side silk screen along with the top ground plane power and bottom layers of the printed circuit board PCM4202EVM User s Guide SBAU103 August...

Страница 16: ...www ti com Schematic PCB Layout and Bill of Materials Figure 5 Top Side Silkscreen SBAU103 August 2004 16 PCM4202EVM User s Guide ...

Страница 17: ...www ti com Schematic PCB Layout and Bill of Materials Figure 6 Bottom Side Silkscreen 17 SBAU103 August 2004 PCM4202EVM User s Guide ...

Страница 18: ...www ti com Schematic PCB Layout and Bill of Materials Figure 7 Top Layer Component Side SBAU103 August 2004 18 PCM4202EVM User s Guide ...

Страница 19: ...www ti com Schematic PCB Layout and Bill of Materials Figure 8 Ground Plane Layer 19 SBAU103 August 2004 PCM4202EVM User s Guide ...

Страница 20: ...www ti com Schematic PCB Layout and Bill of Materials Figure 9 Power Plane Layer SBAU103 August 2004 20 PCM4202EVM User s Guide ...

Страница 21: ...www ti com Schematic PCB Layout and Bill of Materials Figure 10 Bottom Layer Solder Side PCM4202EVM User s Guide SBAU103 August 2004 21 ...

Страница 22: ... 5mm PCB Terminal Block 6 poles 12 J4 1 Samtec TSW 105 07 G D Terminal Strip 10 pin 5x2 13 J5 J6 2 CUI Stack RJC 041 RCA Phono Jack Black Shell 14 J7 1 Kings Electronics KC 79 274 M06 BNC Connector Female PC Mount 15 J8 1 Weidmuller 169968000 3 5mm PCB Terminal Block 3 poles 16 JMP1 2 Samtec TSW 102 07 G S Terminal Strip 2 pin 2x1 JMP2 17 JMP3 1 Samtec TSW 102 07 G D Terminal Strip 4 pin 2x2 18 0 ...

Страница 23: ...er Instruments 35 U7 1 Texas SN74AHC14DBR Hex Schmitt Trigger Inverters Instruments 36 U8 1 Texas SN74AHC08DBR Quad 2 Input Positive AND Gates Instruments 37 U9 U11 3 Texas SN74ALVC245PW Octal Bus Transceiver with Tri State Instruments Outputs 38 U12 U13 2 Texas DIT4192IPW 192kHz Digital Audio Transmitter Instruments 39 U14 1 Texas SN74LVC1G125DBV Single Non Inverting Buffer with Instruments Tri S...

Страница 24: ...ET FORTH ABOVE NEITHER PARTY SHALL BE Liable to the other FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES TI currently deals with a variety of customers for products and therefore our arrangement with the user is not exclusive TI assumes no liability for applications assistance customer product design software performance or infringement of patents or services described herein Please ...

Страница 25: ...tute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction is...

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