Texas Instruments MSP430G2231 Скачать руководство пользователя страница 2

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Clock

System

Brownout

Protection

RST/NMI

DVCC

DVSS

MCLK

Watchdog

WDT+

15-Bit

Timer0_A2

2 CC

Registers

16-MHz

CPU

incl. 16

Registers

Emulation

2BP

JTAG

Interface

SMCLK

ACLK

MDB

MAB

Port P1

8 I/O

Interrupt

capability

pullup/down

resistors

P1.x

Spy-Bi-

Wire

XIN XOUT

RAM

128B

Flash

2KB

ADC

10-Bit

8 Ch.

Autoscan

1 ch DMA

P2.x

Port P2

2 I/O

Interrupt

capability

pullup/down

resistors

USI

Universal

Serial

Interface

SPI, I2C

MSP430G2231-Q1

SLAS787B – NOVEMBER 2011 – REVISED MARCH 2014

www.ti.com

4 Functional Block Diagram

Figure 1. Functional Block Diagram

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MSP430G2231-Q1

Содержание MSP430G2231

Страница 1: ...ency LF timer and ten I O pins The MSP430G2231 devices Oscillator have a 10 bit A D converter and built in communication capability using synchronous 32 kHz Crystal protocols SPI or I2C For configurat...

Страница 2: ...s P1 x 8 Spy Bi Wire XIN XOUT RAM 128B Flash 2KB ADC 10 Bit 8 Ch Autoscan 1 ch DMA P2 x Port P2 2 I O Interrupt capability pullup down resistors 2 USI Universal Serial Interface SPI I2C MSP430G2231 Q1...

Страница 3: ...ut Output With 9 2 Recommended Operating Conditions 16 Schmitt Trigger 34 9 3 Active Mode Supply Current Into VCC Excluding 10 3 Port P1 Pin Schematic P1 4 Input Output With External Current 17 Schmit...

Страница 4: ...on related to operation at 105 C SLAS787B Removed all device variants except for MSP430G2231 Added Device and Documentation Support and Mechanical Packaging and Orderable Information 6 Device Characte...

Страница 5: ...OUT P2 7 13 XIN P2 6 TA0 1 14 DVSS P1 0 TA0CLK ACLK A0 P1 1 TA0 0 A1 P1 2 TA0 1 A2 P1 3 ADC10CLK A3 VREF VEREF P1 4 SMCLK A4 VREF VEREF TCK P1 5 TA0 0 A5 SCLK TMS MSP430G2231 Q1 www ti com SLAS787B NO...

Страница 6: ...mer0_A capture CCI1A input compare Out1 output A6 ADC10 analog input A6 8 7 I O SDO USI Data output in SPI mode SCL USI I2C clock in I2C mode TDI TCLK JTAG test data input or test clock input during p...

Страница 7: ...rpose registers Peripherals are connected to the CPU using data address and control buses and can be handled with all instructions The instruction set consists of the original 51 instructions with thr...

Страница 8: ...K and SMCLK remain active MCLK is disabled Low power mode 1 LPM1 CPU is disabled ACLK and SMCLK remain active MCLK is disabled DCO s dc generator is disabled if DCO not used in active mode Low power m...

Страница 9: ...tchdog Timer WDTIFG maskable 0FFF4h 26 Timer_A2 TACCR0 CCIFG 4 maskable 0FFF2h 25 Timer_A2 TACCR1 CCIFG TAIFG 2 4 maskable 0FFF0h 24 0FFEEh 23 0FFECh 22 ADC10 ADC10IFG 4 5 maskable 0FFEAh 21 USI USIIF...

Страница 10: ...if watchdog mode is selected Active if Watchdog Timer is configured in interval timer mode OFIE Oscillator fault interrupt enable NMIIE Non maskable interrupt enable ACCVIE Flash access violation int...

Страница 11: ...flash memory Features of the flash memory include Flash memory has n segments of main memory and four segments of information memory A to D of 64 bytes each Each segment in main memory is 512 bytes in...

Страница 12: ...y In Flash Information Memory Segment A CALIBRATION DCO FREQUENCY SIZE ADDRESS REGISTER CALBC1_1MHZ byte 010FFh 1 MHz CALDCO_1MHZ byte 010FEh 8 8 2 Brownout The brownout circuit is implemented to prov...

Страница 13: ...0 TACLK INCLK 3 P1 1 2 P1 1 TA0 CCI0A 3 P1 1 2 P1 1 ACLK internal CCI0B 7 P1 5 6 P1 5 CCR0 TA0 VSS GND VCC VCC 4 P1 2 3 P1 2 TA1 CCI1A 4 P1 2 3 P1 2 8 P1 6 7 P1 6 TA1 CCI1B 8 P1 6 7 P1 6 CCR1 TA1 VSS...

Страница 14: ...e 12 Peripherals With Byte Access REGISTER MODULE REGISTER DESCRIPTION OFFSET NAME ADC10 ADC analog enable ADC10AE0 04Ah ADC data transfer control 1 ADC10DTC1 049h ADC data transfer control 0 ADC10DTC...

Страница 15: ...interrupt enable P1IE 025h Port P1 interrupt edge select P1IES 024h Port P1 interrupt flag P1IFG 023h Port P1 direction P1DIR 022h Port P1 output P1OUT 021h Port P1 input P1IN 020h Special Function S...

Страница 16: ...ST pin when blowing the JTAG fuse 3 Higher temperature may be applied during board soldering according to the current JEDEC J STD 020 specification with peak reflow temperatures not higher than classi...

Страница 17: ...IT fDCO fMCLK fSMCLK 1 MHz 2 2 V 220 fACLK 32768 Hz Program executes in flash Active mode AM IAM 1MHz BCSCTL1 CALBC1_1MHZ A current 1 MHz 3 V 300 370 DCOCTL CALDCO_1MHZ CPUOFF 0 SCG0 0 SCG1 0 OSCOFF 0...

Страница 18: ...SCG0 0 SCG1 1 OSCOFF 0 fDCO fMCLK fSMCLK 0 MHz Low power mode 3 fACLK 32768 Hz ILPM3 LFXT1 25 C 2 2 V 0 7 1 5 A LPM3 current 4 CPUOFF 1 SCG0 1 SCG1 1 OSCOFF 0 fDCO fMCLK fSMCLK 0 MHz Low power mode 3...

Страница 19: ...d individually The port pin is selected for input and the pullup pulldown resistor is disabled 9 9 Outputs Ports Px over recommended ranges of supply voltage and operating free air temperature unless...

Страница 20: ...5 3 3 5 VCC 3 V P1 7 TA 25 C TA 85 C OL I Typical Low Level Output Current mA MSP430G2231 Q1 SLAS787B NOVEMBER 2011 REVISED MARCH 2014 www ti com 9 11 Typical Characteristics Outputs over recommended...

Страница 21: ...0 mV td BOR See Figure 11 2000 s Pulse duration needed at RST NMI pin to t reset 2 2 V 3 V 2 s accepted reset internally 1 The current consumption of the brownout module is already included in the ICC...

Страница 22: ...tr Typical Conditions VCC 3 V MSP430G2231 Q1 SLAS787B NOVEMBER 2011 REVISED MARCH 2014 www ti com Figure 13 VCC drop Level With a Triangle Voltage Drop to Generate a POR or BOR Signal 22 Submit Docum...

Страница 23: ...fDCO 3 3 DCO frequency 3 3 RSELx 3 DCOx 3 MODx 0 3 V 0 30 MHz fDCO 4 3 DCO frequency 4 3 RSELx 4 DCOx 3 MODx 0 3 V 0 41 MHz fDCO 5 3 DCO frequency 5 3 RSELx 5 DCOx 3 MODx 0 3 V 0 58 MHz fDCO 6 3 DCO f...

Страница 24: ...is the frequency change from the measured frequency at 30 C over temperature 9 16 Wakeup From Lower Power Modes LPM3 LPM4 Electrical Characteristics over recommended ranges of supply voltage and oper...

Страница 25: ...used ensure that it does not induce capacitive or resistive leakage between the oscillator pins g Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in ot...

Страница 26: ...ly voltage and operating free air temperature unless otherwise noted PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT External SCLK fUSI USI clock frequency Duty cycle 50 10 fSYSTEM MHz SPI slave mode U...

Страница 27: ...V 1 1 1 4 mA current with ADC10SR 0 4 REF2_5V 0 REFOUT 1 ADC10SR 0 fADC10CLK 5 0 MHz Reference buffer supply ADC10ON 0 REFON 1 IREFB 1 3 V 0 5 0 7 mA current with ADC10SR 1 4 REF2_5V 0 REFOUT 1 ADC10...

Страница 28: ...00 A Analog input voltage VAx 0 75 V 2 REF2_5V 0 VREF load regulation 3 V LSB IVREF 500 A 100 A Analog input voltage VAx 1 25 V 2 REF2_5V 1 IVREF 100 A 900 A VREF load regulation VAx 0 5 VREF 3 V 400...

Страница 29: ...ample and conversion period with REBURST 1 4 The accuracy limits the maximum negative external reference voltage Higher reference voltage levels may be applied with reduced accuracy requirements 5 The...

Страница 30: ...des the sensor on time tSENSOR on 4 No additional current is needed The VMID is used during sampling 5 The on time tVMID on is included in the sampling time tVMID sample no additional on time is neede...

Страница 31: ...Spy Bi Wire return to normal operation time 2 2 V 3 V 15 100 s 2 2 V 0 5 MHz fTCK TCK input frequency 2 3 V 0 10 MHz RInternal Internal pulldown resistance on TEST 2 2 V 3 V 25 60 90 k 1 Tools that ac...

Страница 32: ...dge Select PxSEL y PxIES y PxIFG y Direction 0 Input 1 Output PxDIR y PxSEL y 0 1 ADC10AE0 y MSP430G2231 Q1 SLAS787B NOVEMBER 2011 REVISED MARCH 2014 www ti com 10 I O Port Schematics 10 1 Port P1 Pin...

Страница 33: ...N NAME P1 x x FUNCTION ADC10AE x P1DIR x P1SEL x INCH y 1 P1 0 P1 x I O I 0 O 1 0 0 TA0CLK TA0 TACLK 0 1 0 0 ACLK ACLK 1 1 0 A0 A0 X X 1 y 0 P1 1 P1 x I O I 0 O 1 0 0 TA0 0 TA0 0 1 1 0 1 TA0 CCI0A 0 1...

Страница 34: ...0AE0 y MSP430G2231 Q1 SLAS787B NOVEMBER 2011 REVISED MARCH 2014 www ti com 10 2 Port P1 Pin Schematic P1 3 Input Output With Schmitt Trigger Table 14 Port P1 P1 3 Pin Functions CONTROL BITS OR SIGNALS...

Страница 35: ...31 Q1 www ti com SLAS787B NOVEMBER 2011 REVISED MARCH 2014 10 3 Port P1 Pin Schematic P1 4 Input Output With Schmitt Trigger Table 15 Port P1 P1 4 Pin Functions CONTROL BITS OR SIGNALS PIN NAME P1 x x...

Страница 36: ...S787B NOVEMBER 2011 REVISED MARCH 2014 www ti com 10 4 Port P1 Pin Schematic P1 5 Input Output With Schmitt Trigger Table 16 Port P1 P1 5 Pin Functions CONTROL BITS OR SIGNALS PIN NAME P1 x x FUNCTION...

Страница 37: ...is disabled in JTAG mode MSP430G2231 Q1 www ti com SLAS787B NOVEMBER 2011 REVISED MARCH 2014 10 5 Port P1 Pin Schematic P1 6 Input Output With Schmitt Trigger Table 17 Port P1 P1 6 Pin Functions CONTR...

Страница 38: ...drives low level only Driver is disabled in JTAG mode MSP430G2231 Q1 SLAS787B NOVEMBER 2011 REVISED MARCH 2014 www ti com 10 6 Port P1 Pin Schematic P1 7 Input Output With Schmitt Trigger Table 18 Po...

Страница 39: ...PxSEL 6 0 1 MSP430G2231 Q1 www ti com SLAS787B NOVEMBER 2011 REVISED MARCH 2014 10 7 Port P2 Pin Schematic P2 6 Input Output With Schmitt Trigger Table 19 Port P2 P2 6 Pin Functions CONTROL BITS OR S...

Страница 40: ...ut 1 Output PxDIR y PxSEL 7 0 1 from P2 6 XIN MSP430G2231 Q1 SLAS787B NOVEMBER 2011 REVISED MARCH 2014 www ti com 10 8 Port P2 Pin Schematic P2 7 Input Output With Schmitt Trigger Table 20 Port P2 P2...

Страница 41: ...SP TS430PW28A 11 1 1 2 2 Experimenter Boards Experimenter Boards and Evaluation kits are available for some MSP430 devices These kits feature additional hardware components and connectivity for full s...

Страница 42: ...resent evolutionary stages of product development from engineering prototypes with XMS for devices and MSPX for tools through fully qualified production devices and tools with MSP for devices and MSP...

Страница 43: ...mily Series Optional Temperature Range 430 MCU Platform Packaging Device Type Optional A Revision Optional Tape and Reel Feature Set Optional Additional Features MSP430G2231 Q1 www ti com SLAS787B NOV...

Страница 44: ...s have limited built in ESD protection The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates 11 6 Glo...

Страница 45: ...solder bumps used between the die and package or 2 lead based die adhesive used between the die and leadframe The component is otherwise considered Pb Free RoHS compatible as defined above Green RoHS...

Страница 46: ...tal purchase price of the TI part s at issue in this document sold by TI to Customer on an annual basis OTHER QUALIFIED VERSIONS OF MSP430G2231 Q1 Catalog MSP430G2231 Enhanced Product MSP430G2231 EP N...

Страница 47: ...Reel Diameter mm Reel Width W1 mm A0 mm B0 mm K0 mm P1 mm W mm Pin1 Quadrant MSP430G2231IPW4RQ1 TSSOP PW 14 2000 330 0 12 4 6 9 5 6 1 6 8 0 12 0 Q1 MSP430G2231IRSARQ1 QFN RSA 16 3000 330 0 12 4 4 25...

Страница 48: ...e Type Package Drawing Pins SPQ Length mm Width mm Height mm MSP430G2231IPW4RQ1 TSSOP PW 14 2000 367 0 367 0 35 0 MSP430G2231IRSARQ1 QFN RSA 16 3000 367 0 367 0 35 0 PACKAGE MATERIALS INFORMATION www...

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Страница 54: ...sponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related inf...

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