Texas Instruments DS90UB913A-CXEVM, Руководство пользователя

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R
O
U
T
0
R
O
U
T
1
R
O
U
T
2
R
O
U
T
3
R
O
U
T
4
R
O
U
T
5
R
O
U
T
6
R
O
U
T
7
R
O
U
T
8
R
O
U
T
9
R
O
U
T
1
0
R
O
U
T
1
1
GND_A
V
S
Y
N
C
P
C
L
K
O
L
O
C
K
G
P
IO
3
G
P
IO
2
H
S
Y
N
C
P
A
S
S
10k
R25
ROUT0
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUT6
ROUT7
ROUT8
ROUT9
ROUT10
ROUT11
HSYNC
VSYNC
PCLKO
GND_A
GND_A
PASS
LOCK
1
2
Orange
D2
330
R28
330
R29
GPIO3
GPIO2
GPIO1
GPIO0
G
P
IO
1
G
P
IO
0
VDD3P3_A
PASS
LOCK
VDDI2C_A VDD3P3_A
VDD1P8_A
SCL_A
SDA_A
5pF
C1
DNP
DNP
GND_A GND_A
5pF
C11 DNP
DNP
ID
X
0
GND_A
10k
R31
ID
X
1
VDD5V_A
GND_A GND_A
J1 and J3 share the same footprint
J1 and J2: 625mil center-to-center
RIN0P_HSD_ZDIFF
RIN0N_HSD_ZDIFF
V
F
E
E
D
POFL - SOURCE SIDE
RIN1P_Z50
RIN1N_Z50 GND_A
GND_A
GND_A
GND_A
PDN_RX
RES_RX
TESTEN
SEL
OSS_SEL
OEN
BISTEN
GND_A
10k
R39
VDD1P8_A
V
D
D
P
L
L
V
D
D
S
S
C
G
GND_A
49.9
R48
49.9
R49
GND_A
10µH
L5 DNP
DNP
VDD5V_A
10µH
L6 DNP
DNP
GND_A
GND_A
VDD3P3_A
R
E
S
_
R
X
T
E
S
T
E
N
S
E
L
O
S
S
_
S
E
L
O
E
N
B
IS
T
E
N
VDD3P3_A
TESTP_DIFF100
TESTN_DIFF100
H
S
D
_
P
IN
1
_
Z
5
0
H
S
D
_
P
IN
1
_
Z
5
0
10k
R34
Power & bypass
DS90UB914-PG2.SchDoc
1
2
Green
D1
VDD3P3_A
V
D
D
C
ML
RIN0P_HSD_ZDIFF
RIN0N_HSD_ZDIFF
GND_A
VDD5V_A
ESD placed closed to P1
GND_A
Host Adaptor Header
DS90UB914-PG3.SchDoc
PULL-UP PLACED NEAR HEADER
4.7µH
L9
BUS AT 100 MB/S, MATCH LENGTH TO 100MIL
GND_A
49.9
R74
GND_A
JP1, JP8 SEPARATE BY 0.1 INCH
JP9 >0.3 INCH ON EAST SIDE OF JP8
R74 IS A DUMMY PAD
1.00k
R83
1.00k
R87
3.00k
R46
GND_A
0
R107
GND_A
0 R40
0
R33
0
R32
0 R36 DNP
DNP
0 R37 DNP
DNP
0 R42
0 R41
0.1µF C9
0.1µF C8
0.1µF
C2
0.1µF
C13
0.1µF
C6
0.1µF
DNP
C4
DNP
0.1µF
DNP
C5
DNP
0.1µF
C16
0.1µF
C15
0.047µF
C7
1000 ohm
L3
4.70k
R43
4.70k
R35
4.7µF
C3
4.7µF
C14
11.0k
R45
S
D
A
1
S
C
L
2
V
D
D
S
S
C
G
3
OSS_SEL
4
OEN
5
BISTEN
6
VDDIO3
7
PCLK
8
VSYNC
9
HSYNC
10
ROUT[11]
11
ROUT[10]
12
ROUT[9]
13
ROUT[8]
14
ROUT[7]
15
ROUT[6]
16
VDD
D
1
7
ROUT[5]
18
ROUT[4]
19
VDDIO2
20
ROUT[3]
21
ROUT[2]
22
ROUT[1]
23
ROUT[0]
24
GPIO[3]
25
GPIO[2]
26
GPIO[1]
27
GPIO[0]
28
VDDIO1
29
PDB
30
V
D
D
CM
L
1
3
1
RIN1+
32
RIN1-
33
ID
x
[1
]
3
4
ID
x
[0
]
3
5
V
D
D
R
3
6
MODE
37
CMLOUTP
38
CMLOUTN
39
V
D
D
CM
L
0
4
0
RIN0+
41
RIN0-
42
RES
43
RES
44
V
D
D
PL
L
4
5
SEL
46
P
A
SS
4
7
L
O
C
K
4
8
D
A
P
4
9
U1
D
S
9
0
U
B
9
1
4
A
T
R
H
S
T
Q
1
10µF
C10
10µF
C12
0
R47
100uH
L2
5
1
3
DNP
L1
KA4909-AL
DNP
1 2
3 4
DNP
L4
DLW21SN261XQ2L
DNP
VCC
1
NC
2
IO1
3
GND
4
IO2
5
DNP U2
TPD2E001DRLR
DNP
1 2
3 4
JP2
TSW-102-07-G-D
1
2
3
JP3
TSW-103-07-G-S
1
2
3
JP4
TSW-103-07-G-S
1
2 3 4 5
DNP
J1
142-0701-871
DNP
1
2 3 4 5
DNP
J2
142-0701-871
DNP
GND_A
2
1
4
3
PAIR A1
PAIR A2
EMITTER
DNP
P1
D4S20L-40MA5-Z
DNP
1
2 3 4 5
DNP
J3
142-0701-871
DNP
1
2 3 4 5
DNP
J4
142-0701-871
DNP
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15
17
19
21
23
25
27
29 16
18
20
22
24
26
28
30
JP1
TSW-115-08-L-D
1 2
3 4
5 6
7 8
JP8
GND_A
4
1
2
3
JP9
0022112042
10k
R1
10k
R2
10k
R3
10k
R4
10k
R5
10k
R6
10k
R7
10k
R8
10k
R9
10k
R13
10k
R14
10k
R20
10k
R15
10k
R16
10k
R17
10k
R18
10k
R19
10k
R10
10k
R11
10k
R12
10k
R21
10k
R22
10k
R23
10k
R24
10k
R26
10k
R27
4 3
1 6
2 5
S2
78B03ST
1
2
3
4
5
6
13
14
7
12
10
11
8
9
S1
78B07ST
1 2
S4
EVQPNF04M
1
2 3 4 5
J5
59S2AQ-40 MT5-Z
1000 ohm
R38/L14
10k
R30
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DS90UB914A-CXEVM Deserializer Board Schematic
25 SNLU135B – June 2013 – Revised April 2016
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Copyright © 2013–2016, Texas Instruments Incorporated
Schematics
A.2 DS90UB914A-CXEVM Deserializer Board Schematic
1. DS90UB914AQ Deserializer