FPD-Link III Connection
7
SNLU135B – June 2013 – Revised April 2016
Copyright © 2013–2016, Texas Instruments Incorporated
Board Setup Details
2.2
FPD-Link III Connection
J1 is the default SMB connector on both the boards. The FPD-Link III serial stream comes out of J1 on
Serializer board as a single ended signal. Connect it to J1 on the Deserializer board. DOUT- on serializer
and RIN1- on deserializer are terminated to ground through 47-nF capacitor in series with 50
Ω
resistance.
Figure 2-2. Serial Link Connection Using a Single 50-
ω
Coaxial Cable
2.3
LVCMOS Input Connector Description (on DS90UB913AQ Board)
JP1 – GPO0, GPO1, CLK OUT, CLK IN, DIN[11:0], HSYNC, VSYNC, PCLK IN are the input pins for the
LVCMOS interface on Serializer board. The even numbered pins are the input signals. All the odd
numbered pins are connected to VSS. Refer to
below.
JP10 and JP1 pins are not connected.
Figure 2-3. Parallel Input Connector on Serializer Board