T2
T6
T5
T9
T3
T8
T7
T4
T1
I2CSCL
I2CSDA
57
SWRS224A – FEBRUARY 2019 – REVISED AUGUST 2019
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Specifications
Copyright © 2019, Texas Instruments Incorporated
5.18.5.3.1 GPIO Input Transition Time Parameters
lists the input transition time parameters.
Table 5-19. GPIO Input Transition Time Parameters
MIN
MAX
UNIT
t
r
Input transition time (t
r
, t
f
), 10% to 90%
1
3
ns
t
f
1
3
ns
(1)
All timing is with 6-mA drive and 20-pF load.
(2)
This value depends on the value programmed in the clock period register of I
2
C. Maximum output frequency is the result of the minimal
value programmed in this register.
(3)
Because I
2
C is an open-drain interface, the controller can drive logic 0 only. Logic is the result of external pullup. Rise time depends on
the value of the external signal capacitance and external pullup register.
5.18.5.4 I
2
C
The CC3235MODx MCU includes one I2C module operating with standard (100 kbps) or fast (400 kbps)
transmission speeds.
shows the I
2
C timing diagram.
Figure 5-13. I
2
C Timing Diagram
lists the I
2
C timing parameters.
Table 5-20. I
2
C Timing Parameters
(1)
ITEM
NAME
DESCRIPTION
MIN
MAX
UNIT
T2
t
LP
Clock low period
See
(2)
System clock
T3
t
SRT
SCL/SDA rise time
See
(3)
ns
T4
t
DH
Data hold time
NA
T5
t
SFT
SCL/SDA fall time
3
ns
T6
t
HT
Clock high time
See
(2)
System clock
T7
t
DS
Data setup time
tLP/2
System clock
T8
t
SCSR
Start condition setup time
36
System clock
T9
t
SCS
Stop condition setup time
24
System clock