Hardware
12
SWRU507 – May 2017
Copyright © 2017, Texas Instruments Incorporated
AWR1443BOOST, AWR1243BOOST (BoosterPack™)
Table 3. HD Connector Pin Definition (continued)
Pin Number
Description
Pin Number
Description
43
NC
44
DEBUG/CSI_CLKP
45
NC
46
DEBUG/CSI_CLKM
47
NC
48
GND
49
NC
50
DEBUG/CSI_1P
51
I2C_SDA
52
DEBUG/CSI_1M
53
I2C_SCL
54
GND
55
RS232RX (Rx into AWR
device)
56
DEBUG/CSI_0P
57
RS232TX (Tx from AWR
device)
58
DEBUG/CSI_0M
59
nRESET
60
GND
PGOOD – This signal indicates that the state of the onboard VIO supply for the AWR device coming from
the onboard PMIC. A high on the PGOOD signal (3.3 V) indicates the supply is stable. Because the I/Os
are not failsafe, the MCU must ensure that it does not drive any I/O signals to the AWR device before this
I/O supply is stable, to avoid leakage current into the I/Os.
2.4.3
CAN Interface Connector (for AWR1443)
The J3 connector provides the CAN_L and CAN_H signals (see
) from the onboard CAN
transceiver (SN65HVDA540). These signals can be directly wired to the CAN bus.
Because the digital CAN signals (TX and RX) are muxed with the SPI signals on the AWR device, one of
the two paths must be selected. To enable the CAN interface, the R11 and R12 resisters muct be
populated with 0
Ω
, and the R4, R6, R28, and R63 resisters must be removed to disconnect the SPI path.
Figure 8. CAN Connector
