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Evaluating Performance with the ADCPro Software
If the PLL is selected as the clock source, a frequency can be entered in the
Clock Frequency
box; the
software will find the closest frequency that is possible for the PLL to synthesize (and which is within the
maimum allowable frequency for the mode selected) and will set the clock to that frequency, as well as
display the actual frequency used in the
Clock Frequency
box once focus has moved from that control.
Figure 27. Clock Settings and Mode
SBAU129C – November 2007 – Revised July 2008
ADS1178EVM, ADS1278EVM, ADS1178EVM-PDK, and ADS1278EVM-PDK
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