PC
USB
USB
J20
J17
USB Mini-B
Signal Generator
(Input Source)
LMK0
4828
CHB
J3
CHA
J1
+5V
J11
TSW14J56
J4
USB Mini-B
CHC
J5
CHD
J7
+5V
To A, B, C, D
Channels
BPF
Basic Test Procedure
3.4
Test Block Diagram with ADC32Jxx and ADC34Jxx
The test set-up for evaluation of the ADC32J/34Jxx EVM with the TSW1456 Capture Card is shown in
. As seen in this figure, the evaluation setup involves a clock from a high quality on board clock
chip LMK04828 and a sine wave for the analog input from a high-quality signal generator. High order,
narrow bandpass filters are usually required to remove phase noise and harmonic content from the input
sine waves. Since the on board clock and input sinewave are not coherent then the resulting FFT will
need to have a windowing function such as Blackman-Harris/Hamming/Hanning applied to the data.
Figure 16. ADC32Jxx/ADC34Jxx and TSW14J56 Test Setup Block Diagram
24
ADC3xxx, ADC3xJxx EVM User’s Guide
SLAU579A – June 2014 – Revised September 2014
Copyright © 2014, Texas Instruments Incorporated