Open the HSDC Software and Load the FPGA Image to the TSW14J57EVM
14
SLAU640 – April 2019
Copyright © 2019, Texas Instruments Incorporated
Setup Procedure
1. With the EVM GUI open on the PC, navigate to the
Control
tab.
2. To calibrate the ADC, click
Cal Triggered/Running
once, then click it again. This will stop and re-start
the Calibration engine.
NOTE:
This calibrate button executes a calibration sequence that is required for full performance.
This calibration is performed automatically during the
step but must be
performed again, any time the sampling rate changes, after significant temperature change
of the ADC, or after exiting the power-down mode. See the ADC12DJ5200RF device data
sheet, (
) for details regarding the necessary calibration sequence.
3. To enable background calibration, use the following steps:
•
Navigate to the
JESD204C
tab and click on
JESD Block Enable
to stop the JESD204C block.
•
Navigate back to the
Control
tab and click on
Enable Calibration Block
to disable calibration and
allow setting changes.
•
Click on
Enable Background Cal
.
•
If background offset calibration is desired also, click on
Enable Background Offset Cal
.
•
Click on
Enable Calibration Block
to re-enable the calibration subsystem
•
Navigate to the
JESD204C
tab and click on
JESD Block Enable
to re-start the JESD204C block.
•
Navigate back to the
Control
tab and click the
Cal Triggered/Running
button once, then click it
again. This restarts the Calibration engine.
4. To disable background calibration, use the following steps:
•
Navigate to the
JESD204C
tab and click on
JESD Block Enable
to stop the JESD204C block.
•
Navigate back to the
Control
tab and click on
Enable Calibration Block
to disable calibration and
allow setting changes.
•
If background offset calibration was enabled, click on
Enable Background Offset Cal
to disable the
feature.
•
Click on
Enable Background Cal
to disable the feature.
•
Click on
Enable Calibration Block
to re-enable the calibration subsystem.
•
Navigate to the
JESD204C
tab and click on
JESD Block Enable
to re-start the JESD204C block.
•
Navigate back to the
Control
tab and click the
Cal Triggered/Running
button once, then click it
again. This restarts the Calibration engine.
3.11 Open the HSDC Software and Load the FPGA Image to the TSW14J57EVM
1. Open the HSDC Pro software.
2. Click
OK
to confirm the serial number of the TSW14J57EVM device. If multiple TSWxxxxx boards are
connected, select the model and serial number for the one connected to the ADC12DJ5200RFEVM.
3. Select the ADC12DJxx00RF_JMODE1 device from the ADC select drop-down in the top left corner.
4. When prompted, click
Yes
to update the firmware.
NOTE:
If the user configures the EVM with options other than the default register values, different
instructions may be required for selecting the device in HSDC Pro. See
for more
details.
5. Enter the ADC Output Data Rate (ƒ
(SAMPLE)
) as "10400M" or the desired output sample rate. This
number must be equal to the actual sampling rate of the device and must be updated if the sampling
rate changes.
3.12 Capture Data Using the HSDC Pro Software
The following steps show how to capture data using the HSDC Pro software (see
):
1. Select the test to perform.
2. Select the data view.
