TPMC371 User Manual Issue 1.1.5
Page 11 of 22
3.2.2 Device Configuration Registers
The Device Configuration Registers control general operating conditions and monitor the status of
various functions. This includes a 16 bit general purpose counter, multipurpose input/outputs (not
supported by the TPMC371), sleep mode, soft-reset and device identification, and revision. They are
embedded inside the UART 0 Register Set.
Address Register
Description
Access Reset
Value
0x080
INT0 [7:0]
Channel Interrupt Indicator
R
0x00
0x081 INT1
[15:8]
R 0x00
0x082 INT2
[23:16]
R 0x00
0x083 INT3
[31:24]
Interrupt Source Details
R 0x00
0x084 TIMERCNTL
Timer
Control Register
R/W
0x00
0x085 TIMER
Reserved
- 0x00
0x086 TIMERLSB
R/W 0x00
0x087 TIMERMSB
Programmable Timer Value
R/W 0x00
0x088 8XMODE
Sampling
Rate
Select
R/W 0x00
0x089 REGA
Reserved
- 0x00
0x08A RESET
UART
Reset
W 0x00
0x08B
SLEEP
UART Sleep Mode Enable
R/W
0x00
0x08C DREV Device
Revision
R 0x01
0x08D DVID Device
Identification
R 0x28
0x08E REGB
Simultaneous
UART
Write & EEPROM Interface
W
0x00
0x08F
MPIOINT
MPIO Interrupt Mask
R/W
0x00
0x090
MPIOLVL
MPIO Level Control
R/W
0x00
0x091
MPIO3T
MPIO Output Pin Tri-state Control
R/W
0x00
0x092
MPIOINV
MPIO Input Polarity Select
R/W
0x00
0x093
MPIOSEL
MPIO Input/Output Select
R/W
0xFF
Table 3-5 : Device Configuration Registers
For a detailed description of the Device Configuration Registers please refer to the XR17D158 data
sheet which is available on the Exar website (
www.exar.com
). The XR17D158 data sheet is also part
of the TPMC371-ED Engineering Documentation.
